Printed Circuit Design & Fab - March 2008 - (Page 33) Product Performance/Swept-Frequency Measurements of Bare Boards The swept-frequency parameters are good indications of the impedance of the power/ground plane pair. Specifically, |Z11| is the impedance of the power bus (power/ground plane pair) looking into a port. It determines the noise voltage generated in the power bus due to a current drawn at the same port. However, |Z11| measurements can be dominated by the port inductance at high frequencies. In such cases, transfer impedance, |Z21|, can reveal information that is otherwise buried in the input impedance results. The scattering parameter, |S21|, between two different ports in the power bus, which is a function of the transfer impedance, |Z21|, is often used to study the noise voltage generated in the power bus due to a current drawn from another location away from the observation port. For both |Z11| and |S21|, a lower magnitude indicates a lower noise voltage generated in the power bus due to the same amount of noise current. In other words, the lower the magnitude is, the better the power bus performance. Bonding pads designed for decoupling capacitors were chosen as the testing ports, and the S-parameters were obtained from a vector network analyzer. FIGURE 2 and FIGURE 4 show the |S21| versus frequency curves for the 1.5 V/GND and 3.3 V/GND pair, respectively, while FIGURE 3 and FIGURE 5 show the corresponding |Z21| results that are calculated from the S-parameter measurements. At frequencies below 10 MHz, all the curves clearly demonstrate that the BC12TM boards have the lowest power bus impedance; hence, their performance in noise reduction in this frequency range is the best among all types of the 60 50 40 30 20 10 Noise Voltage (dB) 00 100 200 300 400 500 600 700 Frequency (MHz) 800 900 1000 FIGURE 8. Frequency-domain power bus noise: 1.5 V/GND pair, FR-4. boards. BC12 is slightly trailing behind, followed by BC24. The standard boards are obviously the worst. Product Performance/Time-Domain Power Bus Noise Measurements Time-domain power bus noise measurements were taken when the boards are running under a pseudo-functioning script. Again, bonding pads for decoupling capacitors were used as ports, and a flexible coaxial cable was used to connect the port to the Agilent Infiniium 54855A Digital Sampling Oscilloscope. The AC noise voltage was measured using a DC Build 3D full-wave models for interconnects and via-holes Visit us on the web www.cadpartsusa.com (877) 247-2237 The leader in PCB Design and Rapid Prototypes Introduces Introducing Simbeor™ 2007 • 3D full-wave analysis with all dispersion and loss effects • Broadband dielectric models • Metal surface roughness • Metal plating, skin, and proximity effects • Geometry synthesis wizard for impedance-controlled via-holes • S-parameters for via-holes • RLGC(f) parameters for transmission lines • Fits into any design flow “The CAD Library Triple Play” SM Schematic Symbols Land Patterns 3D Models See our web site for details. Authorized Reseller for: Download a free trial at www.simberian.com Symbol Modelers Land Pattern Wizards Simplified Solutions Inc. 3D Footprint Models © 2008 Simberian Inc. For the month of January receive a 10% discount off software and services. Use Code #CADP0108 MARCH 2008 PRINTED CIRCUIT DESIGN & FAB 33 http://www.cadpartsusa.com http://www.cadpartsusa.com http://www.simberian.com http://www.simberian.com
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - March 2008 Printed Circuit Design & Fab - March 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC for the Real World Positive Plating FPGA/PCB Co-design Increases Fabrication Yields Optoelectronics Comes of Age, Part 2 Implementation of Buried Capacitance in High-Speed Designs Ad Index Improved Innerlayer Bonding for Sequential Lamination Off the Shelf Marketplace BGA Bulletin Printed Circuit Design & Fab - March 2008 Printed Circuit Design & Fab - March 2008 - Printed Circuit Design & Fab - March 2008 (Page Cover1) Printed Circuit Design & Fab - March 2008 - Printed Circuit Design & Fab - March 2008 (Page Cover2) Printed Circuit Design & Fab - March 2008 - Printed Circuit Design & Fab - March 2008 (Page 1) Printed Circuit Design & Fab - March 2008 - Contents (Page 2) Printed Circuit Design & Fab - March 2008 - Contents (Page 3) Printed Circuit Design & Fab - March 2008 - Our Line (Page 4) Printed Circuit Design & Fab - March 2008 - Our Line (Page 5) Printed Circuit Design & Fab - March 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - March 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - March 2008 - Around the World (Page 8) Printed Circuit Design & Fab - March 2008 - Around the World (Page 9) Printed Circuit Design & Fab - March 2008 - Around the World (Page 10) Printed Circuit Design & Fab - March 2008 - Around the World (Page 11) Printed Circuit Design & Fab - March 2008 - Happenings (Page 12) Printed Circuit Design & Fab - March 2008 - Happenings (Page 13) Printed Circuit Design & Fab - March 2008 - ROI (Page 14) Printed Circuit Design & Fab - March 2008 - ROI (Page 15) Printed Circuit Design & Fab - March 2008 - EMC for the Real World (Page 16) Printed Circuit Design & Fab - March 2008 - EMC for the Real World (Page 17) Printed Circuit Design & Fab - March 2008 - Positive Plating (Page 18) Printed Circuit Design & Fab - March 2008 - Positive Plating (Page 19) Printed Circuit Design & Fab - March 2008 - FPGA/PCB Co-design Increases Fabrication Yields (Page 20) Printed Circuit Design & Fab - March 2008 - FPGA/PCB Co-design Increases Fabrication Yields (Page 21) Printed Circuit Design & Fab - March 2008 - FPGA/PCB Co-design Increases Fabrication Yields (Page 22) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 23) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 24) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 25) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 26) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 27) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 28) Printed Circuit Design & Fab - March 2008 - Optoelectronics Comes of Age, Part 2 (Page 29) Printed Circuit Design & Fab - March 2008 - Implementation of Buried Capacitance in High-Speed Designs (Page 30) Printed Circuit Design & Fab - March 2008 - Implementation of Buried Capacitance in High-Speed Designs (Page 31) Printed Circuit Design & Fab - March 2008 - Implementation of Buried Capacitance in High-Speed Designs (Page 32) Printed Circuit Design & Fab - March 2008 - Implementation of Buried Capacitance in High-Speed Designs (Page 33) Printed Circuit Design & Fab - March 2008 - Implementation of Buried Capacitance in High-Speed Designs (Page 34) Printed Circuit Design & Fab - March 2008 - Ad Index (Page 35) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 36) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 37) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 38) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 39) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 40) Printed Circuit Design & Fab - March 2008 - Improved Innerlayer Bonding for Sequential Lamination (Page 41) Printed Circuit Design & Fab - March 2008 - Off the Shelf (Page 42) Printed Circuit Design & Fab - March 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - March 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - March 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - March 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - March 2008 - Marketplace (Page 47) Printed Circuit Design & Fab - March 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - March 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - March 2008 - BGA Bulletin (Page Cover4)
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