Printed Circuit Design & Fab - March 2008 - (Page 35)

below 20 MHz, BC12TM board had the lowest impedance followed by BC12 and BC24. Standard FR-4 had the highest impedance. Apparently, the simulation results shown in Figure 12 and the measurement results shown in Figure 5 are well correlated. This proves the possibility of calculating impedance with PCB information before fabricating a board for optimum PDN design. Cost/Performance Analysis The cost of a embedded capacitance printed circuit board assembly is compared against a standard material assembly for this application. Taking into consideration the cost reduction by removing the capacitors and their associated assembly cost, the estimated cost increase is 8%, 15%, and 26% for the BC24, BC12, and BC12TM assemblies respectively. One reason the cost was higher is the fact that the board had to be redesigned from a 12-layer to a 14-layer product. For many applications the layer count would remain the same. Also, the BC materials are more expensive than standard FR-4 materials. One of the most significant advantages for embedding the capacitors is the area that is freed up for routing traces, and the potential to decrease the size of the board. Depending on the application, mechanical constraints and the number of capacitors required, these benefits could contribute to overall improvements and faster time to market. The cost differences and benefits will vary depending upon the application and volume. in the power/ground plane pair, in terms of lowering power bus impedance and reducing power bus noise. These thin power/ground layers achieved a comparable or even better performance with bulk decoupling capacitors only. The simulated and actual results compared favorably, and the decision to remove all the decoupling capacitors proved to be effective. Although the initial cost analysis of implementing buried capacitance is higher than the standard board with capacitors, there are other benefits to complete the analysis. Designs that do not need additional layers to achieve the embedded capacitance, as an example, will be easier to cost justify. PCD&F Ed note: This article is a synopsis of the simulated and measured product data related to the performance of buried capacitance layers. Additional details can be found in the paper entitled “Utilization of Buried Capacitance – A Case Study” presented at DesignCon 2008. ACKNOWLEDGMENTS We would like to acknowledge our respective companies and UMR for supporting this study. Conclusions Initial measurements and simulations clearly demonstrate the benefits of these embedded capacitance materials used JUN FAN is a professor at the University of Missouri-Rolla; jfan@ umr.edu. NORM SMITH is a design engineer and JIM KNIGHTEN is an EMI and signal integrity engineer at Teradata; Norm.Smith@ Teradata.com, Jim.Knighten@Teradata.com. JOHN ANDRESAKIS is vice president of strategic technology at Oak-Mitsui Technologies; john.andresakis@oakmitsui.com. YOSHI FUKAWA is president of TechDream; yoshi@tech-dream.com. MARK HARVEY is an engineer at Sanmina-SCI; mark.harvey@sanmina-sci.com. ADVERTISER INDEX To learn more about the advertisers in this issue, go to pcdandf.com and select “Advertiser Index” in the home page menu. This will provide you with a direct link to the Web site of each advertiser in this index. ADVERTISER Accutrace Bare Board Group CADParts & Consulting LLC Cam Expert LLC Circuitronix LLC Compufab Compunetics CPCA Show 2008 Current Inc. DownStream Technologies eFabPCB EMA Design Automation Enthone EzPCB Front Panel Express Imagineering Intercept Technology IPC Expo 2008 Isola MacDermid PAGE # 44 44 33 45 45 46 44 13 35 3 45 5 19 44 44 45 9 15 24-25 7 ADVERTISER Mentor Graphics Midwest Accurate Grinding National Instruments/ Electronics Workbench Group Online Electronics OverflyPacific Corp. PCB Austin PCB East 2008 PCB Fab Express PCB-Pool Plasma Etch Precision Technologies Samtec Inc. Sierra Proto Express Simberian Inc. Sun Chemical Sunstone Circuits Superior Processing Virtual PCB PAGE # Cover 4 46 Cover 2 44 45 22 47 45 39 27 46 31 Cover 3 33 29 1 46 11 With 35 years of experience We make our own laminates in the U.S. • Material types in FR-4 Difunctional, Tetrafunctional and Multifunctional • Temperature ratings from 130˚C to 177˚C • Thickness ranges from .0025” to 3.000” • Coppers from 1/2 oz. to 6 oz. in stock • Black, Blue, Tan, Green, Orange & Natural • True Cryogenic G10 • Sheet sizes in 36”x48” • RoHS compliant, UL recognized and IPC approved Same Day Pricing and Lead Times Current, Inc. 30 Tyler St. Ext • East Haven, CT 06512 1-877-436-6542 • Fax 203-467-8435 www.currentcomposites.com Louis S. Owen, Director of Outside Sales 860-350-9607 • Fax 860-210-1748 PRINTED CIRCUIT DESIGN & FAB 35 The advertising index is published as an additional service. The publisher does not assume any liability for errors or omissions. MARCH 2008 http://www.currentcomposites.com http://pcdandf.com http://www.currentcomposites.com

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - March 2008

Printed Circuit Design & Fab - March 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC for the Real World Positive Plating FPGA/PCB Co-design Increases Fabrication Yields Optoelectronics Comes of Age, Part 2 Implementation of Buried Capacitance in High-Speed Designs Ad Index Improved Innerlayer Bonding for Sequential Lamination Off the Shelf Marketplace BGA Bulletin

Printed Circuit Design & Fab - March 2008

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