Printed Circuit Design & Fab - April 2008 - (Page 31) produced poor signal waveforms with an eye opening of just 90 mV beyond the reference voltage and failed to meet the HSTL specification. Through the demonstrated iterative optimization process, the eye opening improved to over 300 mV, the signal quality improved dramatically, and the signals now exceed the HSTL specification by 100 mV. In addition to determining reasonable parasitic values for the termination resistors, optimization routines also aided in the development of the application-specific termination architecture. Where it could have taken hundreds or even thousands of simulations and many weeks of hands-on time using traditional manual approaches to produce the same results, the use of optimization routines in this case reduced the number of manual steps down to three and reduced the hands-on effort to a few hours. REFERENCES 1. Nimmagadda, S., A. Moncayo, and J. Dillon. Measurement, Modeling and Simulation of a High Speed Digital System Using VNA and HSPICE. Northcon. 1996. Seattle, WA: IEEE. 2. Huang, C.-C., et al. Extraction of accurate package models from VNA measurements. in Electronics Manufacturing Technology Symposium. 2000. Santa Clara, CA: IEEE. 3. Zabinski, P B. Buhrow, B. Gilbert, and E. Daniel, Application of Opti., mization Routines in Signal Integrity Analysis, DesignCon 2007, Santa Clara, CA, January 29 to February 1, 2007. 4. Yun, I. and G.S. May. Passive Circuit Model Parameter Extraction Using Genetic Algorithms. in 1999 Electronic Components and Technology Conference. 1999. San Diego, CA: IEEE. 5. Levenberg-Marquardt Algorith, http://en.wikipedia.org/wiki/Levenberg-Marquardt_algorithm 6. Ananth Ranganathan,The Levenberg-Marquardt Algorithm, cc.gatech. edu/people/home/ananth/docs/lmtut.pdf, June 2004. 7. Fletcher, R., Practical Methods of Optimization, NY, Wiley, 1993. 8. Gill, P .E., Murray, W. and Wright, M.H., Practical Optimization, Academic Press, London, 1981. 9. Levenberg, K. ”A method for the solution of certain problems in least squares, Quart. Appl. Math., 2, 164-168, 1944. ” 10. Marquardt, D. ”An algorithm for least-squares estimation of nonlinear parameters, SIAM J. Appl. Math., 11, 431-441, 1963. ” 11. High Speed Transceiver Logic (HSTL): A 1.5 V Output Buffer Supply Voltage Based Interface Standard for Digital Integrated Circuits. 1995, Electronic Industries Association. 12. 72Mb M-die DDRII SRAM Specification, 2006, Samsung. Conclusions Judicious use of optimization routines can save significant effort using automated methods to determine appropriate values to meet specific user-defined performance goals, subject to constraints. In addition, optimization can be of tremendous help in determining appropriate circuit topologies for both models and circuits, and can often be used to navigate through the various conflicting goals of cost, reliability, and performance. Optimization should be used with caution, because issues such as non-convergence and inappropriate results can occur. Therefore, it is imperative that all results are validated, and it is recommended that users familiarize themselves with all optimization options prior to using this procedure. PCD&F PAT ZABINSKI is a principal engineer, BEN BUHROW is a senior engineer, BARRY K. GILBERT is director of the specialpurpose processor development group and ERIK S. DANIEL is deputy director of the special-purpose processor development group, all at the Mayo Clinic; zabinski.patrick@mayo.edu. Simbeor 2007 ® PCB designer PCB designer (DK00646) How does joining one of Denmark’s largest PCB design team and using the most advanced tools available to manufacture top-of-the-line industrial electronics sound? Perhaps you are the new PCB designer we are looking for at Danfoss Drives. It is the perfect challenge for your skills in PCB layout, schematic entry and high speed digital and analogue design. Based at our product development department at our factory in Gråsten you will play an important part in designing the printed circuit boards we use in our solutions and preparing them for production. Interested? Click and see the full job description at jobs.danfoss.com Danfoss Drives is one of the most significant manufacturers of variable speed drives in the world, with headquarter located in Denmark, and production facilities in both Denmark, US and China. Easy-to-use, efficient and cost-effective 3-D full-wave electromagnetic software for design of communication links at 10 Gb/s and beyond! Visit www.simberian.com for more information and to download free fully functional software. © 2008 Simberian Inc. APRIL 2008 PRINTED CIRCUIT DESIGN & FAB 31 http://en.wikipedia.org/wiki/Levenberg-Marquardt_algorithm http://en.wikipedia.org/wiki/Levenberg-Marquardt_algorithm http://www.simberian.com http://jobs.danfoss.com http://www.simberian.com
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - April 2008 Printed Circuit Design & Fab - April 2008 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar Interconnect Strategies Positive Plating Improving Fabrication Yields by Design Solve Design Problems with Signal Integrity Optimization Laser Direct Imaging Made Easy Troubleshooting the Innerlayer Process SIPS Give More to Moore Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - April 2008 Printed Circuit Design & Fab - April 2008 - (Page Belly1) Printed Circuit Design & Fab - April 2008 - (Page Belly2) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page Cover1) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page Cover2) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page 1) Printed Circuit Design & Fab - April 2008 - Contents (Page 2) Printed Circuit Design & Fab - April 2008 - Contents (Page 3) Printed Circuit Design & Fab - April 2008 - Our Line (Page 4) Printed Circuit Design & Fab - April 2008 - Our Line (Page 5) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 8) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 9) Printed Circuit Design & Fab - April 2008 - Around the World (Page 10) Printed Circuit Design & Fab - April 2008 - Around the World (Page 11) Printed Circuit Design & Fab - April 2008 - Around the World (Page 12) Printed Circuit Design & Fab - April 2008 - Around the World (Page 13) Printed Circuit Design & Fab - April 2008 - Happenings (Page 14) Printed Circuit Design & Fab - April 2008 - Happenings (Page 15) Printed Circuit Design & Fab - April 2008 - ROI (Page 16) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast1) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast2) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast3) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast4) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast5) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast6) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast7) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast8) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast9) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast10) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast11) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast12) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast13) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast14) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast15) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast16) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert1) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert2) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert3) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert4) Printed Circuit Design & Fab - April 2008 - ROI (Page 17) Printed Circuit Design & Fab - April 2008 - Tip Jar (Page 18) Printed Circuit Design & Fab - April 2008 - Tip Jar (Page 19) Printed Circuit Design & Fab - April 2008 - Interconnect Strategies (Page 20) Printed Circuit Design & Fab - April 2008 - Interconnect Strategies (Page 21) Printed Circuit Design & Fab - April 2008 - Positive Plating (Page 22) Printed Circuit Design & Fab - April 2008 - Positive Plating (Page 23) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 24) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 25) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 26) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 27) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 28) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 29) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 30) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 31) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 32) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 33) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 34) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 35) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 36) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 37) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 38) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 39) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 40) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 41) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 42) Printed Circuit Design & Fab - April 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - April 2008 - Ad Index (Page 47) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page Cover4)
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