Printed Circuit Design & Fab - April 2008 - (Page PCBEast6) CONFERENCE-AT-A-GLANCE Sunday, May 11 8 am - 1 pm Registration 9 am - 5 pm 9 am – 12:30 pm Technical Conference courses S1 - Resources and Standards for Your Company 11 am - 1:30 pm Speaker: Jeffrey Benes, Catalyst Manufacturing Speaker: Susy Webb, Fairfield Industries 2 pm - 3 pm F4 - NEW! If You Can Make It, They Professional Development Certificate Program courses DEC 1 – High-Speed Design Speaker: Lee Ritchey, Speeding Edge Lunch break for Technical Conference attendees 12 pm - 1 pm Can Fake It: Counterfeit Parts and China Speaker: David Ackerman, AckermanUSA DEC 2 – NEW! Electrical Principles: Digital Circuits and Electrical Systems Speaker: Ralph Morrison, consultant Professional Development Attendee Lunch 1:30 pm – 5 pm 3 pm - 5 pm F5 - NEW! Thoughts on Founding DEC 3 - Design Challenges with and Operating a Small, HighTech Company Speaker: Ron Schaefer, PhotoMachining HDI/Microvias Including HandsOn Design Speakers: Happy Holden, Mentor Graphics, and Mike Fitts, Plexus Technical Conference courses S2 - NEW! Library Creation and Management 5 pm - 7 pm Wine and Cheese Mixer 7 pm - 11 pm Speaker: Susy Webb, Fairfield Industries T1 - Control of EMI and Crosstalk Speaker: Rick Hartley, L-3 Communication, Avionics Systems - NEW! The Basics of PCB Layout Speaker: Susy Webb, Fairfield Industries - NEW! Everything You Need S3 - NEW! Design for Flip-Chip, in PCBs Chip-Size and 3-D Array Package Technology ”Casino Night at the Speakeasy” Networking Party T2 Speaker: Vern Solberg, consultant S4 - Embedded Passive Component Wednesday, May 14 8 am - 4 pm T3 Technology Available Now to Know About Bypassing, Including BGAs Speaker: Richard Snogren, Bristlecone Registration 9 am - 11 am Speaker: Robert Hanson, Americom Seminars Tuesday, May 13 8 am - 7 pm 12 noon- 1 pm Registration 8:30 am - 11 pm Technical Conference courses W4 - NEW! Power System Design in High-Speed PCBs Professional Development Attendee Lunch FREE Tuesday sessions and events 8:30 am - 10 am NEW! Next- Generation EDA Tools W5 Speaker: Rick Hartley, L-3 Communications, Avionics Systems – NEW! PCB Cost Modeling— Monday, May 12 8 am - 4 pm How Designers Affect PCB Costs Speaker: Richard Snogren, Bristlecone Registration 9 am - 5 pm Panel Session W6 - Implementing Advanced Technologies: How to Achieve Success Within Your Organization Speaker: Mike Fitts, Plexus Moderator: PCD&F Editor Kathy NargiToth Professional Development Certificate Program courses continued 9 am - 11 am 10 am - 10:30 am FREE Sessions F1 - NEW! PCB Design Using the Speaker: Andy Kowalewski, SyChip 10 am - 11 am W7 - NEW! Intro to Technical Conference courses W1 - NEW! Catch & Release: Verifying, Optimizing, Post Processing and Documenting PCB Designs for Manufacturing Metric System Micromachining Using Lasers Speaker: Ron Schaefer, PhotoMachining W8 - The Challenge of Selling Value FREE Sessions F2 - NEW! Death of a PCB Salesman Speaker: Greg Papandrew, Bare Board Group in Today’s Complex Supply Chains Speaker: Louis De Rose, DeRose & Associates W2 Speakers: Rick Almeida and Ray Fugitt, DownStream Technologies - NEW! Design Principles for 9 am - 12:30 pm BGA, CSP and 3-D Package Technologies Speaker: Vern Solberg, consultant 11 am - 12 noon Keynote Address 12 noon - 7 pm Technical Conference courses S5 - NEW! Traces as Transmission Lines Speaker: Ralph Morrison, consultant Speaker: Andy Kowalewski, SyChip W3 - Base Materials for High-Speed, Exhibits Open 1 pm - 2 pm F3 - NEW! Transition to (RoHS) S6 - NEW! Hand Routing 12:30 pm - 1:30 pm High-Frequency and Lead-Free PCBS Speaker: Rick Hartley, L-3 Communications, Avionics Systems Restriction of Hazardous Substances Lunch break for TC attendees PCB EAST 2008 | TINLEY PARK, IL | WWW.PCBEAST.COM http://WWW.PCBEAST.COM
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - April 2008 Printed Circuit Design & Fab - April 2008 Contents Our Line Market Watch Around the World Happenings ROI Tip Jar Interconnect Strategies Positive Plating Improving Fabrication Yields by Design Solve Design Problems with Signal Integrity Optimization Laser Direct Imaging Made Easy Troubleshooting the Innerlayer Process SIPS Give More to Moore Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - April 2008 Printed Circuit Design & Fab - April 2008 - (Page Belly1) Printed Circuit Design & Fab - April 2008 - (Page Belly2) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page Cover1) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page Cover2) Printed Circuit Design & Fab - April 2008 - Printed Circuit Design & Fab - April 2008 (Page 1) Printed Circuit Design & Fab - April 2008 - Contents (Page 2) Printed Circuit Design & Fab - April 2008 - Contents (Page 3) Printed Circuit Design & Fab - April 2008 - Our Line (Page 4) Printed Circuit Design & Fab - April 2008 - Our Line (Page 5) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 8) Printed Circuit Design & Fab - April 2008 - Market Watch (Page 9) Printed Circuit Design & Fab - April 2008 - Around the World (Page 10) Printed Circuit Design & Fab - April 2008 - Around the World (Page 11) Printed Circuit Design & Fab - April 2008 - Around the World (Page 12) Printed Circuit Design & Fab - April 2008 - Around the World (Page 13) Printed Circuit Design & Fab - April 2008 - Happenings (Page 14) Printed Circuit Design & Fab - April 2008 - Happenings (Page 15) Printed Circuit Design & Fab - April 2008 - ROI (Page 16) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast1) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast2) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast3) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast4) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast5) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast6) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast7) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast8) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast9) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast10) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast11) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast12) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast13) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast14) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast15) Printed Circuit Design & Fab - April 2008 - ROI (Page PCBEast16) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert1) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert2) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert3) Printed Circuit Design & Fab - April 2008 - ROI (Page Insert4) Printed Circuit Design & Fab - April 2008 - ROI (Page 17) Printed Circuit Design & Fab - April 2008 - Tip Jar (Page 18) Printed Circuit Design & Fab - April 2008 - Tip Jar (Page 19) Printed Circuit Design & Fab - April 2008 - Interconnect Strategies (Page 20) Printed Circuit Design & Fab - April 2008 - Interconnect Strategies (Page 21) Printed Circuit Design & Fab - April 2008 - Positive Plating (Page 22) Printed Circuit Design & Fab - April 2008 - Positive Plating (Page 23) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 24) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 25) Printed Circuit Design & Fab - April 2008 - Improving Fabrication Yields by Design (Page 26) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 27) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 28) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 29) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 30) Printed Circuit Design & Fab - April 2008 - Solve Design Problems with Signal Integrity Optimization (Page 31) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 32) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 33) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 34) Printed Circuit Design & Fab - April 2008 - Laser Direct Imaging Made Easy (Page 35) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 36) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 37) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 38) Printed Circuit Design & Fab - April 2008 - Troubleshooting the Innerlayer Process (Page 39) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 40) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 41) Printed Circuit Design & Fab - April 2008 - SIPS Give More to Moore (Page 42) Printed Circuit Design & Fab - April 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - April 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - April 2008 - Ad Index (Page 47) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - April 2008 - BGA Bulletin (Page Cover4)
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