Printed Circuit Design & Fab - May 2008 - (Page 18)

Electroplating: Panel and Pattern Plating, Part 1 Electroplating difficulty is measured by board thickness, hole diameter and aspect ratio. IF ONE THOUGHT that electroless copper and other metallization systems were complex, and the deep dark secrets of these systems were shrouded in black magic, this month’s discussions on electroplating will seem like brain surgery. In this next series of columns, the intricacies of electrodeposition technolMICHAEL ogy and its function of building up the CARANO thickness of copper in the through holes and on the board surface will be presented in detail. The function of the active ingredients in the electrolytic copper plating solutions will be presented. Process control limits for the various plating solution components and the effects on deposit integrity will be discussed. Electrodeposition In contrast to the classic initial through-hole metallization with electroless copper, the buildup of the conductive layer to a desired thickness in a through-hole is achieved by the electrodeposition of copper. It is understood that these technologies overlap, i.e., that some initial metallization processes use direct electroplating and, conversely, fully additive processes deposit copper solely with the electroless process. The historic preference for electroplating relates to the lower cost, faster deposition rate, and the generally better metallurgical properties of the electroplated copper. Different chemical compositions of electroplating copper baths have been in use, such as alkaline pyrophosphate baths and acid cupric sulfate baths. Sulfuric acid based compositions now dominating the industry. Improvements have been concentrated on the “throwing copper” of the baths (e.g., their ability to deposit a relatively uniform layer of copper in a through-hole and on the board surface). A shift to higher acid and lower copper concentrations, as well as improved organic additive systems, (brighteners, carriers, and levelers) have demonstrated the ability to improve throwing power. Several other electroplating processes are used in the fabrication of the printed circuit boards. Tin/lead or tin can be electroplated, and occasionally they can be deposited from an electroless chemistry to act as a metal etch resist. Other electroplated metals include nickel/gold and palladium (also deposited from immersion baths or electroless baths when deposited selectively) to form suitable surface finishes for insertion connectors or component attachment (e.g., wire bonding). Focusing on the acid copper electroplating process, the first step is the preplate cleaning sequence of acid soak cleaner, microetch, and acid predip. The acid predip is optional and can be omitted if rinsing after microetching is sufficient. However, this only applies when using peroxide sulfuric acid micro-etchants. Use of persulfate based etchants requires an acidic predip. Critical acid cleaner variables are chemical composition, concentration, time, and temperature. Regarding the microetch process, etch depth is the critical parameter, and is influenced by the chemical composition, concentration, time, and temperature. The acid predip, typically the same acid at the same concentration that is used in the plating bath, protects the plating solution from undesirable drag-in, which might adversely affect the composition or concentration of the Board Thickness2/ Hole Diameter Effect on IR drop at 10 & 20 asf 30 25 Difficulty Factor 20 15 10 5 0 Current density .186, .186, .125,.186,.024.012 .048 .125, .125, .024 .012 .062, .062, .012 .048 .062, .024 .048 .062, .048 .062, .024 .062, .012 .125, .048 .125, .024 .125, .012 .186, .048 .186, .024 .186, .012 10 asf FIGURE 1. An example of throwing power measurements in a PTH. 18 FIGURE 2. Difficulty factor. The left column represents board thickness and the right column represents hole diameter. PRINTED CIRCUIT DESIGN & FAB 20 asf MAY 2008

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - May 2008

Printed Circuit Design & Fab - May 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC For the Real World PCB East Conference Brochure Positive Plating Don't Let your Signals Stub Their Toes Improve PCB Layout With Skill Utility Programs The Next Generation Design Tool Challenge Thermally Conductive Microwave Materials PCB Dielectric Degradation in Lead-Free Assembly Applications A Tale of Two Trade Shows Eliminating Board Defects Off the Shelf Marketplace Ad Index BGA Bulletin

Printed Circuit Design & Fab - May 2008

For optimal viewing of this digital publication, please enable JavaScript and then refresh the page. If you would like to try to load the digital publication without using Flash Player detection, please click here.