Printed Circuit Design & Fab - May 2008 - (Page 32)

LEAD-FREE RELIABILITY PCB Dielectric Degradation in LEAD-FREE ASSEMBLY Applications Reliable lead-free assemblies require a collaborative approach that optimizes the PCB design along with specific base materials and known fabrication processes. by PAUL REID With the advent of RoHS companies have been forced to restrict the amount of lead in the electronic equipment produced. To comply with these guidelines, there has been a move toward the use of lead-free solders for PCB assemblies. Most lead-free solders require higher assembly and rework temperatures. Tin-lead solder assembly has historically used temperatures that did not exceed 230˚C. but the typical soldering temperatures required for lead-free solder range from 245 to 270˚C. The extra 15˚C to 30˚C required for leadfree assembly has been demonstrated to reduce the reliability of PCBs, and this is expressed as increased failures at assembly and a reduction of the field life in the end use environment. The ability of PCBs to survive multiple assembly cycles has become a concern in high-end applications (high layer count and aspect ratios, thicker constructions, reduced grid and hole size, complex/ multiple interconnections, etc.). Following a simulated lead-free assembly and rework on representative test coupons, a 50% reduction in reliability has been commonly demonstrated even in well designed, well fabricated PCBs made with high reliability lead-free compatible materials. Common failure modes like barrel cracking still dominate, but material degradation has now become a significant influence, and can confound the reliability results. Material degradation has a number of detrimental effects, the primary reliability effect being the artificial extension of thermal cycles to failure (CTF), due to the stress relieving influence of internal delamination. In addition, material breakdown provides a potential path for the growth of conductive anodic filaments (CAF) between adjacent features in the end use environment. Long-term impact of delamination is a potential change in the electrical characteristics of the PCB, including impedance values. TABLE 1. Thermal cycles to failure without material delamination. CONTROL Preconditioning Cycles as Percentage Thermal Cycles As Rec 100% 500 SN/PB 3x230˚C 6x230˚C 80% 400 60% 300 LOW TEMP Pb-FREE HIGH TEMP Pb-FREE 3x245˚C 6x245˚C 75% 375 55% 275 3x260˚C 6x260˚C 70% 350 50% 250 Testing Methodologies TABLE 2. Thermal cycles to failure with and without material delamination. CONTROL Preconditioning Percent Reliability As Rec 100% SN/PB 3x230°C 6x230°C 80% 400 80% 400 60% 300 60% 300 LOW TEMP Pb-FREE HIGH TEMP Pb-FREE 3x245°C 6x245°C 75% 375 80% 400 55% 275 87.5% 425 3x260°C 6x260°C 70% 350 90% 450 50% 250 0% 500 Thermal Cycles (no material degradation) 500 Percent Reliability Thermal Cycles (with delamination) 100% 500 Preconditioning is a simulation of the thermal excursions experienced by the PCBs in assembly and rework. Assembly simulation is typically three thermal cycles to the maximum assembly temperature, while assembly and rework simulation is five or six thermal excursions. Preconditioning is achieved by processing representative samples through assembly ovens, or by heating MAY 2008 32 PRINTED CIRCUIT DESIGN & FAB

Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - May 2008

Printed Circuit Design & Fab - May 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC For the Real World PCB East Conference Brochure Positive Plating Don't Let your Signals Stub Their Toes Improve PCB Layout With Skill Utility Programs The Next Generation Design Tool Challenge Thermally Conductive Microwave Materials PCB Dielectric Degradation in Lead-Free Assembly Applications A Tale of Two Trade Shows Eliminating Board Defects Off the Shelf Marketplace Ad Index BGA Bulletin

Printed Circuit Design & Fab - May 2008

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