Printed Circuit Design & Fab - May 2008 - (Page 48) BGA Fanout Patterns, Part 3 Aligning blind via fanout patterns can significantly increase route density. WE HAVE ALREADY come to the fifth article in this series on BGA breakout and routing methods. Those who have been following along have CHARLES read about unusual PFEIL and upcoming packages, theoretical breakout solutions, and the limited set options when using through-via fanout patterns. The intent in all these articles is to provide ideas and methods that will enable greater route density for BGAs, resulting in fewer layers while still maintaining signal and power integrity. the via sizes are still larger than in an HDI stackup using micro-vias, the blind and buried vias are still small enough to obtain significant route density gains. Shifting Vias In FIGURE 1, the blind-vias have been shifted into columns with the intent of opening up additional routing space. In FIGURE 2, you can see that significant space is created as compared to the unshifted pattern in FIGURE 3. FIGURE 2 shows how shifting the vias can add an additional 24% increase in the number of escape traces at the edge of the BGA. Observe that the blind vias are not in a straight column because via size and via-to-via clearance (0.1mm) forces them to be staggered. The advantages of shifting vias include: ■ 24% increased route density per layer over through-vias and unshifted blind vias. Blind and Buried Fanouts The basic principles for effectively using fanout patterns can be applied when using blind and buried vias, even in a laminated stackup. Although More room for a ground plane on the mount layer (but not as much room as with via-in-pad). ■ If you route the high-speed singleended nets on the layers using blind vias, via stubs are eliminated and via-to-via crosstalk is minimized. ■ Any signal routed on the blind via layers will not need to have a buried via, thus opening up route space on the buried via layers as well. The disadvantage is that blind and buried via stackup is slightly more expensive than a through-via stackup. As shown above with blind vias, it is clear that shifting the via position can increase route density. When using HDI microvias, shifting the fanout locations can improve route density even more. Increased route density means potentially fewer layers and lower cost. There are some general principles related to shifting vias that can help make the effort successful. Continued on p. 47 ■ FIGURE 1. Mount layer with drilled blind-vias shifted into columns. FIGURE 3. Compare layer 2 with blindvias using a common 1mm matrix. FIGURE 5. Differential pair coupling affected by shifting vias. FIGURE 2. Layer 2 with drilled blindvias shifted into columns. 48 FIGURE 4. Differential pair coupling affected by shifting vias. FIGURE 6. Layer 3 buried vias. MAY 2008 PRINTED CIRCUIT DESIGN & FAB
Table of Contents Feed for the Digital Edition of Printed Circuit Design & Fab - May 2008 Printed Circuit Design & Fab - May 2008 Contents Our Line Market Watch Around the World Happenings ROI EMC For the Real World PCB East Conference Brochure Positive Plating Don't Let your Signals Stub Their Toes Improve PCB Layout With Skill Utility Programs The Next Generation Design Tool Challenge Thermally Conductive Microwave Materials PCB Dielectric Degradation in Lead-Free Assembly Applications A Tale of Two Trade Shows Eliminating Board Defects Off the Shelf Marketplace Ad Index BGA Bulletin Printed Circuit Design & Fab - May 2008 Printed Circuit Design & Fab - May 2008 - Printed Circuit Design & Fab - May 2008 (Page Cover1) Printed Circuit Design & Fab - May 2008 - Printed Circuit Design & Fab - May 2008 (Page Cover2) Printed Circuit Design & Fab - May 2008 - Printed Circuit Design & Fab - May 2008 (Page 1) Printed Circuit Design & Fab - May 2008 - Contents (Page 2) Printed Circuit Design & Fab - May 2008 - Contents (Page 3) Printed Circuit Design & Fab - May 2008 - Our Line (Page 4) Printed Circuit Design & Fab - May 2008 - Our Line (Page 5) Printed Circuit Design & Fab - May 2008 - Market Watch (Page 6) Printed Circuit Design & Fab - May 2008 - Market Watch (Page 7) Printed Circuit Design & Fab - May 2008 - Around the World (Page 8) Printed Circuit Design & Fab - May 2008 - Around the World (Page 9) Printed Circuit Design & Fab - May 2008 - Around the World (Page 10) Printed Circuit Design & Fab - May 2008 - Around the World (Page 11) Printed Circuit Design & Fab - May 2008 - Happenings (Page 12) Printed Circuit Design & Fab - May 2008 - Happenings (Page 13) Printed Circuit Design & Fab - May 2008 - ROI (Page 14) Printed Circuit Design & Fab - May 2008 - ROI (Page 15) Printed Circuit Design & Fab - May 2008 - EMC For the Real World (Page 16) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-1) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-2) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-3) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-4) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-5) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-6) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-7) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-8) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-9) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-10) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-11) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-12) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-13) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-14) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-15) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page PCB-16) Printed Circuit Design & Fab - May 2008 - PCB East Conference Brochure (Page 17) Printed Circuit Design & Fab - May 2008 - Positive Plating (Page 18) Printed Circuit Design & Fab - May 2008 - Positive Plating (Page 19) Printed Circuit Design & Fab - May 2008 - Don't Let your Signals Stub Their Toes (Page 20) Printed Circuit Design & Fab - May 2008 - Don't Let your Signals Stub Their Toes (Page 21) Printed Circuit Design & Fab - May 2008 - Don't Let your Signals Stub Their Toes (Page 22) Printed Circuit Design & Fab - May 2008 - Don't Let your Signals Stub Their Toes (Page 23) Printed Circuit Design & Fab - May 2008 - Improve PCB Layout With Skill Utility Programs (Page 24) Printed Circuit Design & Fab - May 2008 - Improve PCB Layout With Skill Utility Programs (Page 25) Printed Circuit Design & Fab - May 2008 - The Next Generation Design Tool Challenge (Page 26) Printed Circuit Design & Fab - May 2008 - The Next Generation Design Tool Challenge (Page 27) Printed Circuit Design & Fab - May 2008 - The Next Generation Design Tool Challenge (Page 28) Printed Circuit Design & Fab - May 2008 - Thermally Conductive Microwave Materials (Page 29) Printed Circuit Design & Fab - May 2008 - Thermally Conductive Microwave Materials (Page 30) Printed Circuit Design & Fab - May 2008 - Thermally Conductive Microwave Materials (Page 31) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 32) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 33) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 34) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 35) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 36) Printed Circuit Design & Fab - May 2008 - PCB Dielectric Degradation in Lead-Free Assembly Applications (Page 37) Printed Circuit Design & Fab - May 2008 - A Tale of Two Trade Shows (Page 38) Printed Circuit Design & Fab - May 2008 - A Tale of Two Trade Shows (Page 39) Printed Circuit Design & Fab - May 2008 - Eliminating Board Defects (Page 40) Printed Circuit Design & Fab - May 2008 - Eliminating Board Defects (Page 41) Printed Circuit Design & Fab - May 2008 - Eliminating Board Defects (Page 42) Printed Circuit Design & Fab - May 2008 - Off the Shelf (Page 43) Printed Circuit Design & Fab - May 2008 - Marketplace (Page 44) Printed Circuit Design & Fab - May 2008 - Marketplace (Page 45) Printed Circuit Design & Fab - May 2008 - Marketplace (Page 46) Printed Circuit Design & Fab - May 2008 - Ad Index (Page 47) Printed Circuit Design & Fab - May 2008 - BGA Bulletin (Page 48) Printed Circuit Design & Fab - May 2008 - BGA Bulletin (Page Cover3) Printed Circuit Design & Fab - May 2008 - BGA Bulletin (Page Cover4)
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