EDNE December 2012 - (Page 12)

pulse Power Application Controller for “digital control of analogue power” T he Power Application Controller (PAC) platform, from Active Semi, is an integrated device that drives the power switches in an inverter, motor drive or switch-mode power supply application. It takes in a number of functions that are conventionally performed by multiple active and passive components, thereby saving board area, parts-count and cost. Functions include a 32-bit ARM-based microcontroller, configurable analogue front-end and signal conditioner, internal power supply, gate drive bootstrap and protection. There is a dedicated PWM engine, a power management block with four linear regulators, a 10-bit 1-µsec ADC, and device-specific output drivers. It constitutes a complete high-voltage power driver for up to 600-V operation. It will be the first of a MCUbased family of devices to be known as Micro Application Controller (µAC) solu- A 48-V, 350-W brushless DC motor driver in conventional technology and built with the PAC5220. tions and the company claims it will cut development time by up to 50% and lower development costs by as much as 60% for some applications.The IC hosts a 32-bit ARM Cortex-M0 processor with dedicated peripherals giving advanced control technologies with an energy- efficient MCU core. The complete power conversion solution lets system developers focus on the development of valueadded features instead of power supply design: the analogue front-end supports current/voltage sensing, over-current protection, sensor-less control and other critical signal-conditioning tasks. Active Semi used a tile-based analogue array methodology, anticipating that this will permit quick silicon modifications to support different applications, cutting new IC development time by at least 3 months. A limited supply of PAC platform samples along with hardware and software design kits are available now. Volume production will commence in early 2013 with volume unit pricing starting at under $1.00. —by Graham Prophet Active-Semi, www.active-semi.com ARM steps up to 64-bit with Cortex-A50 Series cores A RM has announced a high-end processor core series in the shape of the Cortex-A50, based upon the ARMv8 architecture, initially comprising Cortex-A53 and Cortex-A57 processors. It heralds a new, energyefficient 64-bit processing technology, as well as extending existing 32-bit processing. Licence holders will scale the core offering to address markets ranging from smartphones through to high-performance servers, ARM says. The Cortex-A57 is ARM’s most advanced high-performance applications processor, while the Cortex-A53 is the most power-efficient ARM application processor, while also being the world’s smallest 64-bit processor. They can operate independently or be combined into an ARM big.LITTLE processor configuration, combining high performance with power efficiency. Both are supported by the ARM CoreLink 400 and new CoreLink 500 series system IP fabric solutions. Cortex-A57 and Cortex-A53 processors will be incorporated into multi-GHz performance on advanced CMOS and FinFET processes (i.e. 20-nm and below) technologies. Announced licensees of the new processor series include AMD, Broadcom, Calxeda, HiSilicon, Samsung and STMicroelectronics. The Cortex-A50 processors can have optional cryptographic acceleration that can speed up authentication software up to x10, and are interoperable with ARM Mali graphics processors for GPU compute applications. The Cortex-A57 provides computer performance comparable to a legacy PC in a mobile power budget, enabling cost and power efficiency benefits for both enterprise users and consumers: the Cortex-A53 will deliver the performance expected in today’s superphone experience while using a quarter of the power. —by Graham Prophet ARM, www.arm.com Soft-core, 8051 8-bit CPU IP core in 3000 gates P olish IP Core provider Digital Core Design has introduced the DT8051, an IP core for the 8051 architecture and, its authors claim, the most powerful tiny 8051 available. A complete system with peripherals and the DoCD debugger needs just 6,650 ASIC gates, while a standalone CPU utilises little more than 3k gates. The DT8051 can run in very small FPGA devices or can be just a tiny fragment of a Systemon-Chip ASIC. The very low gate count area allows the core to run at up to 300 MHz in Hynix’ 180-nm library (equivalent performance to the original 80C51, clocked at 2400 MHz). The DT8051 soft core is 100% binary-compatible with the industry standard 8051 8-bit microcon- 12 EDN EUROPE | december 2012 www.edn-europe.com http://www.active-semi.com http://www.arm.com http://www.edn-europe.com

Table of Contents for the Digital Edition of EDNE December 2012

Cover
Contents
Texas Instruments Europe
Microchip
Digi-Key
Masthead
EDN comment
Pulse
Digi-Key
Baker’s Best
Embedded World 2013
Test & Measurement World
Rohde & Schwarz
Digi-Key
Squeezing the most from battery cells with a switched-mode pump
Signal integrity
Processor architectures : one to rule them all ?
Digi-Key
Mechatronics in Design
Advances in wireless speaker performance and technology
Design Ideas
Teardown; the ultimate Consumer Product ?
Product roundup
Tales from the Cube

EDNE December 2012