EDNE June 2012 - (Page 18)

® A mo insight intonthly T&M techn the latest o the pages ology from Measurem f Test & (www.tmw ent World orld.com ) Test & Measurement World is the leading monthly magazine for engineers and managers in the electronics testing industry. Bridge software and hardware to accelerate SOC validation System-on-a-chip debug and verification requires an understanding of hardware and software relationships By Brad Quinton, Tektronix ® OCs (systems-on-a-chip) have progressed to the point where they now include a complex mix of software, firmware, embedded processors, GPUs (graphics processing units), memory controllers, and other high-speed peripherals. This increased functional integration, combined with faster internal clock speeds and complex, high-speed I/O, means that delivering a functional and fully validated system is harder than ever. Traditionally, software validation and debug and hardware validation and debug have existed in separate worlds. Often, software and hardware teams have worked in isolation, with the former concentrating on software execution within the context of the programming model, and the latter debugging within the hardware-development framework, where clock-cycle accuracy, parallel operation, and the relationship of debug data back to the original design is key. In theory, fully-debugged software and hardware should work flawlessly together. But in the real world, that rarely happens, a fact that often leads to critical cost increases and time-tomarket delays. To deliver increased integration within a reasonable cost and time, the industry must use a new approach: “design for visibility.” Said another way, engineers must design—up front—the ability to deliver a full system view in order to permit effective validation and debug of SOCs. Engineers need to be able to understand causal relationships between behaviors that span hardware and software domains. This article outlines an approach to debugging an SOC that makes use of embedded instruments; we have found that integrating the hardware and software debug views can lead to faster and more efficient debug of the entire system. building the test bed The test bed SOC shown in Figure 1 is composed of a 32-bit RISC instruction set processor connected to an AMBA (advanced microcontroller bus architecture) AHB (advanced high-performance bus) and an AMBA APB (advanced peripheral bus).The SOC also contains a DDR2 memory controller, a Gigabit Ethernet network adapter, a Compact-Flash controller, a VGA controller, and a number of low-speed peripheral interfaces. The SOC runs the Debian GNU Linux operating system version 4 running kernel v2.6.21. The processor core operates at 60 MHz, the DDR memory controller at 100 MHz, and the other I/O peripherals operate at their native frequencies between 33 MHz and 12 MHz. The entire SOC is implemented on a Virtex-5 development board. Together, this system is a fully S functional computer that can provide terminal-based user access, connect to the Internet, run applications, and mount file systems. Such an SOC creates complex debug scenarios and stresses the capabilities of both hardware and software debug infrastructures. In most cases, key operations span hardware and software. debug inFRAstRuCtuRes Developers of processor cores generally provide debug infrastructures, either as a fixed set of features for a given core or as a configurable add-on to a family of cores. In either case, the debug infrastructure becomes a part of the manufactured core. Debug software then uses this infrastructure to provide debug features to software developers. The processor core supports a basic set of debug capabilities similar to those available on most modern processors, including those from Intel, AMD, IBM, Oracle, and ARM. In this case, a “backdoor” that is accessible via the JTAG bus allows a software debugger, for example GDB (GNU Debugger), to read and write memory in the system and detect the operational state of the processor. Because of this, and because they also have access to the original software source code, GDB and other software debuggers can provide software breakpoints, single-step operation, examination of variable values, stack tracing, configuration of initial 18 EDN EUROPE | JUNE 2012 www.edn-europe.com http://www.tmworld.com http://www.edn-europe.com

Table of Contents for the Digital Edition of EDNE June 2012

Cover
Agilent Technologies
Contents
International Rectifier
RS Components
Masthead
International Rectifier
Comment
Pulse
Analog Devices
Digi-Key
Farnell
NXP
Test & Measurement
Silicon Labs
Digi-Key
Test-driven development for embedded C: why debug?
Digi-Key
Baker’s best
Cover story
Rohde & Schwarz
Rohde & Schwarz
Rohde & Schwarz
Rohde & Schwarz
Rohde & Schwarz
Pico-projector design uses color LEDs
Digital isolation in smart energy metering applications
Mechatronics in design
Teardown
Design Idea
Product Roundup
Tales from the cube

EDNE June 2012