EDNE October 2012 - (Page 59)

designideas readerS SOLVe deSIGN PrOBLeMS Quasistatic Spice model targets ceramic capacitors with Y5V dielectric Hugo Coolens, KaHo Sint-Lieven, Ghent, Belgium DIs Inside 61 Microcontroller drives ↘ piezoelectric buzzer at high voltage through one pin 61 Circuit automatically Ceramic Y5V SMT capacitors have recently become available in values and sizes that were previously available only with electrolytic capacitors. At first glance, they may seem a worthwhile unpolarized alternative to electrolytic capacitors, and they sometimes are. These capacitors, however, have a capacitance that is a function of the applied voltage. Modeling them as ordinary linear capacitors can lead to great discrepancies between simulated and measured—let alone expected—results. Figure 1 shows some measurements of capacitance as a function of dc voltage on a 10-μF, 25V Y5V 1206 capacitor. Reference 1 describes a method of modeling nonlinear capacitors using a look-up table. The use of a look-up table, however, adds complexity to the simulation and can lead to con9×10-6 8×10 -6 vergence problems. If you limit the operating voltage to approximately 80% of the capacitor’s voltage rating, you may find that a simpler quadratic quasistatic model can be sufficient for quickly arriving at a first approximation. Fitting the measured data of C to a0+(a1VDC)+(a2V2DC) using quadratic regression yields the coefficients of 8.500065×10−6, −7.445791×10−7, and 1.922001×10−8 for a0, a1, and a2, respectively. Listing 1 shows the conversion from the parameters to the nonlinearcapacitor model in PSpice. You can see the equivalent capacity in PSpice’s graphical postprocessor Probe as i(c)/(2*3.14159*frequency). The differences between the measured values and the quadratic approximation are at worst approximately 20% (Figure 2). The relative residues are switches off DMM 62 Reconstruct the input current in a groundedimpedance current sensor 63 Complementary-pair dc/dc converter simultaneously doubles, inverts supply voltage ▶To see all of EDN’s Design Ideas, visit www.edn.com/designideas normally-distributed with a mean of 2.5% and a standard deviation of 10%. Those deviations might seem to be a rough approximation for a model, but you must compare them with the normal linear C model, for which the relative error at 50% of the dc-voltage rating SPICE MEASUREMENTS Listing 1 conversion parameters quadratic y5v−cap model . param a0=8.500065u . param a1=−744.5791n . param a2=19.22001n . param valdc=1 c 1 0 cmod {a0} vin 1 0 dc { valdc } ac 1 . model cmod cap ( c=1 vc1={a1/a0 } vc2={a2 /a0 }) . ac dec 20 100 100k . step lin param valdc 0 25 1 *display equivalent c as i ( c )/(2*3.141 5 9 *frequency) . probe . end 7×10-6 6×10-6 CAPACITANCE (F) 5×10-6 4×10-6 3×10-6 2×10-6 1×10-6 0 5 10 DC VOLTAGE (V) 15 20 Figure 1 This graph measures capacitance as a function of dc voltage on a 10-μF, 25V Y5V 1206 capacitor. www.edn-europe.com OCTOBER 2012 | EDN EuropE 59 http://www.edn.com/designideas http://www.edn-europe.com

Table of Contents for the Digital Edition of EDNE October 2012

Cover
Contents
International Rectifier
Microchip
RS Components
Masthead
Microchip
EDN Comment
Pulse
Analog Devices
Farnell
Baker's best
Omicron
Test & Measurement World
Agilent Technologies
Maxim Integrated Products
Maxim Integrated Products
Digi-Key
Mixed-signal SOC verification using analog behavioral models
Messe München
Bergquist
The future of connected-device security
Silicon Laboratories
Digi-Key
Coilcraft
Messe München
Image sensors evolve to meet emerging embedded vision needs
Digi-Key
Chip Expo
National Instruments
Supply chain
Introducing software-designed instrumentation to test-and-measurement
Digi-Key
Mechatronics in design
Design ideas
Product Roundup
Tales from the cube

EDNE October 2012