EDNE September 2012 - (Page 13)

Achieving lowest total system cost with Cyclone V FPGA devices In today’s economic climate delivering low cost is critical, and in the electronics industry designers need to minimize the overall system cost. With this in mind, Altera developed Cyclone ® V FPGAs that enable integration of more of the system into the FPGA, while helping to reduce the overall bill of materials. Cyclone V low cost, low power FPGA device families Family Cyclone V E Cyclone V GX Cyclone V GT Cyclone V SE Cyclone V SX Cyclone V ST Logic (KLE) 25 - 300 25 - 300 75 - 300 25 - 110 25 - 110 85 - 110 Memory (Mb) 1.56 - 12.76 1.2 - 12.76 4.62 - 12.76 1.4 - 5.1 1.4 -5.1 4.0 - 5.1 Transceivers 3.125 Gbps 5 Gbps 3.125 Gbps 5 Gbps Scan to learn more Processor Dual Cortex-A9 Dual Cortex-A9 Dual Cortex-A9 Architecture Cyclone V FPGAs are built on the TSMC 28nm LP process. This process is tailored specifically for low-cost and low-power applications and has enabled Altera to integrate more functionality and features into the FPGA devices. The Cyclone V logic fabric is built around the Adaptive Logic Module (ALM) whose architecture consists of a dense 8-input fracturable look-up table. This enables logic designs to be tightly packed into the ALMs and use fewer layers of logic and routing resource. DSP support has been enhanced with variable-precision DSP blocks that are capable of supporting different widths of multiplication, from 9x9, to 27x27 and single-precision floating point (mantissa multiplication) within a single DSP block. DSP blocks also include, dedicated coefficient banks and feedback paths to support digital filters like finite impulse response (FIR) and fast fourier transform (FFT) filters. Cyclone V FPGAs support further integration and cost reduction by including hard implementations of popular IP blocks like PCIe® IP (Gen1 and Gen2), memory controllers (DDR3, DDR2, LPDDR2 and Mobile DDR), and even embedded ARM Cortex-A9 processors in the Cyclone V SoC family. Board Layout The Cyclone V FPGA pin-out has been designed to simplify board layout and maximize signal integrity, thereby minimizing PCB design and debug effort and reducing manufacturing costs. Cyclone V features at a glance • 28-nm TSMC low-power process technology • Enhanced ALM with four registers • Variable precision digital signal processing (DSP) blocks • Internal M10K and 640 bit MLAB memories • Integrated transceivers operating between 611 Mbps and 5 Gbps with hardened support for key protocols • Embedded PCI Express® hard IP (PCIe ® Gen1 x1,x2,x4, Gen 2 x1,x2) • 400 MHz/800 Mbps external memory interface with hardened DDR3,DDR2, LPDDR, and LPDDR memory controller • Partial and dynamic reconfiguration • Security & Tamper protection • Free Development tool support with Quartus® II Web Edition Reduced system costs Beyond the integration of system logic into one FPGA device, additional innovations have been made to reduce the overall bill of materials and reduce PCB real estate and cost. Power System Devices have been designed to reduce the number of power rails by including on-chip voltage regulators. It is possible to use as few as two voltage supplies to support both logic and transceivers. Clocking Cyclone V FPGAs include fractional phase-locked loops capable of fractional frequency synthesis of any clock frequency, allowing them to replace external oscillators so that only one external crystal oscillator is required. Visit www.altera.com/cycloneV for more information http://www.altera.com/cycloneV http://www.altera.com/cycloneV http://www.altera.com/cycloneV http://www.altera.com/cycloneV

Table of Contents for the Digital Edition of EDNE September 2012

Cover
Contents
International Rectifier
Microchip
RS Components
Masthead
Microchip
EDN Comment
Pulse
Analog Devices
Altera
Baker's best
Messe München
Test & Measurement World
Agilent Techno
Digi-key
Bergquist
Advanced power switches boost microhybrid emissions gains
Digi-Key
Image sensors evolve to address Emerging embedded- vision needs
Renesas
Silicon Labs
Digi-Key
Vicor
Power becomes a software issue as smart phones become smarter
IAN
Power : a significant challenge in EDA design
Digi-Key
Mechatronics in Desin
Design Ideas
Product roundup
Tales from the Cube

EDNE September 2012