The File - March 16 , 2009 - (Page 7)

In Focus | Analogue-mixed signal design Eliminate substrate coupling in MS SoCs continued from page physical implementation level. Most issues can be partially or completely eliminated using the proper solution at different levels. However, there is a “ghost” problem known as substrate noise caused by the large amount of switching activities in high speed digital cores to analogue/RF components. This problem is always present. However, if known at early design stage, it can be tackled at physical implementation level with minimum degradation to the driving factors discussed earlier. Substrate noise is becoming a growing concern because of the need to achieve higher clock frequency, analogue precision, technology scaling and tighter integration of analogue with the digital domain. In the following sections, I am going to discuss the substrate coupling phenomenon, a simplistic substrate model, the substrate effects and isolation techniques in MS designs. I will then conclude with a possible CAD solution. Figure 1: A simple substrate model. Substrate coupling Recently, mixed-signal and RF circuit designers are trying to integrate low-noise and sensitive analogue circuits on the same substrate as noisy and switching digital circuits. The main motivations behind this effort are reduction in package cost and power dissipation, and system compactness. This effort is even more necessary due to high frequency of operation with reduction in feature size (65nm, 45nm and 32nm). Off-chip modelling of high frequency signals is no longer an issue because of the low power requirements. The major disadvantage of this heavy integration is the increased interaction between sensitive analogue portion and switching digital portion which are sharing the same substrate. This interaction could result to mutual inductance and capaci- Figure 2: Propagation constant versus frequency and doping. Figure 3: Eddy current modelling. tance, which exist between two high frequency signal carrying lines. Another result of this on-chip integration is substrate coupling. This happens due to non-homogenous nature of substrate material. At high frequency of operation, this common substrate provides non-ideal iso- lation between sensitive and perturbing portions. There are currents flowing in substrate due to non-zero di-electric constant continued on page EE Times-India | March 16-31, 2009 | www.eetindia.com http://www.eetindia.co.in/SEARCH/SUMMARY/technical-articles/analogue%5E%40%5Erf.HTM?TheFile_090316 http://www.eetindia.co.in/STATIC/REDIRECT/Newsletter_090316_EETI02.htm

Table of Contents for the Digital Edition of The File - March 16 , 2009

The File - March 16 , 2009