Instrumentation & Measurement Magazine 24-2 - 60

Thermal Noise Measurement
and Characterization for Modern
Semiconductor Devices
Chih-Hung Chen

hermal noise in electronic devices sets the fundamental limitation for receiver front ends [1], analog [2],
mixed-signal [3], and even digital circuits [4] for their
signal-to-noise ratio (SNR) [5], dynamic range, data acquisition rate, and power consumption. Therefore, thermal noise
becomes particularly important for emerging applications
such as quantum computing (QC) [6] for its qubits' sensitivity and weak signal strength. It is expected that thermal noise
will become a hindrance to these emerging applications due to
thermal-noise-induced false bit-flips [7]. Therefore, it is crucial
to characterize the thermal noise and understand its physical
origin in nanoscale devices. These provide insights for material scientists, process engineers, and circuit designers to
optimize their devices and circuits' noise performance so that
the social and economic advantages offered by the advances in
semiconductor technologies can continue.

Noise Performance of Nanoscale Transistors
For devices, the continuous downscaling of complementary
metal-oxide-semiconductor (CMOS) processes has enabled
modern nanoscale metal-oxide-semiconductor field-effect
transistors (MOSFET) with cut-off frequencies (fT) and maximum oscillation frequencies (fmax) in the range of several
hundred GHz [8]. Together with the advantages of low fabrication cost, low power consumption, and high-level integration,
CMOS technology becomes a competitive candidate for radio frequency (RF) or millimeter-wave applications, such as
wireless sensor networks and Internet of Things (IoT). In these
low-power and high-frequency applications, the device's
noise performance becomes critically important because it
determines the noise performance of the low-noise amplifier
(LNA), which is usually the first stage in the front-end receiver
and determines the noise performance of the overall receiver.
Therefore, it is crucial to be able to characterize the thermal
noise of MOSFETs accurately. As shown in Fig. 1, nanoscale
MOSFETs demonstrate an excellent noise performance with its
minimum noise figure NFmin as low as 0.2 dB at 4 GHz [8]-[20].
According to the review in [21] for different methods, the most
accurate technique calculating the NFmin of a receiver achieves
60

0.2 dB accuracy, which implies that there exists a 100% uncertainty in the NFmin characterization for future nanoscale
MOSFETs at 4 GHz. Therefore, the characterization technique
plays an increasingly important role in nanoscale transistors'
noise characterization with such a low NFmin.

Measurement Techniques for Thermal Noise
The noise performance of a noisy linear two-port network
is characterized by either SNR or noise factor. The noise factor concept was first introduced by Friis in 1944 as the ratio
of the available SNR at the input terminals of a two-port network to the available SNR at its output terminals, when the
source admittance is at the standard temperature (To) 290 K
[21]. In 1957, the Institute of Radio Engineers (IRE), in practice,
defined the spot noise factor (or noise figure in dB) of a linear network at a specified frequency as the ratio of 1) the total output
noise power per unit bandwidth available at the output port
to 2) that portion of 1) produced by the input terminal at the
standard temperature To [23]. In 1960, the IRE defined standard methods to measure the noise factor of a noisy two-port

Fig. 1. Noise performance of nanoscale MOSFETs down to 28-nm technology
node.

IEEE Instrumentation & Measurement Magazine
1094-6969/21/$25.00©2021IEEE

April 2021

Instrumentation & Measurement Magazine 24-2

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