Instrumentation & Measurement Magazine 24-2 - 68

	


Rnsh

id2

W 
  	(45)
4 kTo gm2  L 

for circuit designers to compare the noise performance between technology nodes.

Noise Source Implementation
After obtaining the power spectral densities of the channel thermal noise id2 and the induced gate noise ig2 of a MOSFET
from either theory [73] or experiment, the next step is to implement these noise sources into the circuit simulator. The
method proposed here uses sub-circuits, and people can apply this method to any compact model (e.g., BSIM3v3, MOS
11, or EKV model) used in circuit simulators. Fig. 7 shows the
proposed noise equivalent circuit, including the substrate
network and noise sources. In this paper, I implement the
noise sources of the channel thermal noise and the induced
gate noise in MOSFETs using the BSIM3v3 compact model
as an example.

Fig. 8. Noise reference circuits to generate noise currents for (a) the
enhanced channel noise ide and (b) the induced gate noise ig shown in Fig. 7.

of interest with the flicker noise parameter Kf set to zero. I can
then calculate the value of Rde by:
Rde 

	

4 kT
2
d

2
i  idBSIM

.	(46)

Enhanced Channel Thermal Noise
In nanoscale MOSFETs, the channel thermal noise id2 is usually higher than that predicted using the noise theory for long
channel transistors [74], and people need to capture this additional channel thermal noise (or the so-called enhanced
channel thermal noise) in the circuit simulation. I implement this enhanced channel thermal noise using a Current
Controlled Current Source (i.e., ide in Fig. 7), whose value is
controlled by the noise current generated by the reference resistance Rde and flowing through the reference voltage source
Vde as shown in Fig. 8a. Here I set the dc and ac voltages of the
source Vde to zeros, and therefore the reference circuit only
has an impact on the noise simulation. Since the BSIM compact model already generates some noise current idBSIM, the
proposed noise source ide should only compensate for the difference between id and idBISM. I can determine the noise spectral
density idBSIM by running noise simulations at the bias condition

Induced Gate Noise
For the induced gate noise ig shown in Fig. 7, I also implement
it using a Current Controlled Current Source. Due to the capacitive coupling of the channel thermal noise into the gate
terminal, the induced gate noise is proportional to the frequency square. Because the BSIM3v3 compact model does not
produce the induced gate noise, the task here is to find out a
reference circuit for ig whose power spectral density is proportional to frequency square without worrying about the
compact model's contribution. By trying different RLC circuits, I found that an RC circuit shown in Fig. 8b could generate
the desired frequency dependency with a proper selection of
the resistance value Rind and the capacitance value Cind. To facilitate the computation, I normalize the induced gate noise by
frequency square, i.e.,
i g2

N ind 

	

f2

.	(47)

I can then obtain the values of Rind and Cind by
	

N ind  fop

C
100 
ind

8 kT

	(48)

and
	

Rind 

4 kT



N ind 100 fop



2

	(49)

where fop is the operating frequency of interest.

Conclusions
Fig. 7. Noise equivalent circuit of a MOSFET, including parasitic resistance
(RD, RG, and RS), substrate network (DD, DS, RDB, RSB, and RDSB), enhanced channel
noise (ide), and induced gate noise (ig) for high-frequency integrated circuit
designs.
68	

This paper presents a complete solution for the thermal
noise measurement and characterization of advanced nano-
scale transistors. It provides detailed procedures for the
noise measurement system, DUT design, noise parameter de-embedding, noise source extraction, and noise source

IEEE Instrumentation & Measurement Magazine	

April 2021



Instrumentation & Measurement Magazine 24-2

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