Instrumentation & Measurement Magazine 24-2 - 77

The amplitude of low-frequency sideband noise after demodulation is found from:

ASB  Cβsin  Δθ sin  n  cos  2 f mt  (4)

where ψn is a non-deterministic noise term; C is a constant related to the carrier amplitude and frequency response of the
DUT; Δθ is the phase shift caused by the system delay, DUT,
and Δϕ (Fig. 2). We can see that by a complete compensation of
phase shift between the reference signal and the device output
signal, close-to-carrier phase noise components do not produce low-frequency components close-to-dc at the output of
the multiplier.

Dynamic Reserve
If a synchronous demodulator exhibits some nonlinearity,
asynchronous signals may affect the output dc level, indistinguishable from changes due to sensor response. Synchronous
demodulators usually show good linear behavior in a certain
range of signal and noise levels. For instance, one may set a
threshold that causes an error of 5% in the response when measuring a full-scale coherent input. As might be expected, this
maximum allowed asynchronous level can be far greater than
the level of coherent signal required as much stronger interfering signals may accompany the desired signal. A wide input
range is thus held 'in reserve' for noise and interference components, an idea which leads to the definition of the dynamic
reserve as the ratio between the maximum allowed peak-topeak level of the asynchronous signal and peak-to-peak level
of coherent signal diving full-scale output. A dynamic reserve of 20 dB means the system can tolerate ten times more
noise than the desired signal. Dynamic reserves of 60 to 80 dB
are common among modern phase-sensitive detectors. This
parameter can be defined as the ratio of overload over the
full-scale input level. Overload is defined as the input level
at overload or critical overload at either stage of the lock-in
amplifier. We know that when measuring weak signals, we
are usually dealing with input with a low SNR, resulting in
time overload. As a result, overload occurs at times when the
amount of noise increases exponentially. In other words, it can
be said that the overload is the maximum amount of input
noise that the system can withstand. Having a high dynamic
reserve capacity can ensure that the system will not be overloaded during the measurement [15].

Software and Hardware
Implementations

Conclusions
Synchronous demodulators or lock-in amplifiers or phasesensitive detectors have proven to have a special place in
measuring very weak signals in noisy environments. They
have shown to be very useful for eliminating undesired signals
in the measurement process. Although more than a century of
research and development has been done on these systems,
we still see that many researchers around the world are investigating interesting problems for better analyzing the systems
and develop new applications. In recent years we have seen
research trends to integrate the design to establish a portable
embedded system and analyze its nonlinear behavior, which
eventually led to broader use of the system.

References
[1] M. L. Meade, " Advances in lock-in amplifiers, " J. Phys. E., vol. 15,

Different approaches can be used to implement the hardware
setup of synchronous demodulators. These implementations
can be analog or digital, discrete, or integrated. The early
synchronous demodulators that were built were analogous.
Initially, sine functions were used to excite the system, but
later, due to their simplicity, the square signal became more
dominant. Later, with the advent and development of digital systems and analog-to-digital converters, many circuits
were designed and implemented with the ability to program
April 2021

reference signals and process incoming signals. Instead of being completely analog, the circuits became a combination of
digital and analog circuits so that the reference signal was generated analog. However, the rest of the functions inside the
system were all digital [16]. In the mid-1980s, analog synchronous demodulators were replaced by Digital Signal Processing
(DSP) designs. These DSP-based designs were based on the
usual quadrature detection method for measuring signals,
which is still used in digital demodulators, including software-defined radios. Depending on the application in which
the circuit was used, all processing could be done on a DSP
board or by a computer; furthermore, it was possible to implement the design with FPGA. With the continuous growth
and development of the CMOS manufacturing industry and
mixed-signal circuit design tools, the focus on integrated design based became more critical [17], [18].
The mechanism used in the software implementation of
a synchronous demodulator is the same mechanism used in
modern radio systems to determine the demodulation characteristics of radio. In these systems, it is crucial to digitalize
the signal properly. After digitalization, any kind of demodulation algorithm can be done on the signal by changing the
software. Additionally, if we use open-source software, new
demodulation ideas can be implemented in the software without changing the system hardware, which allows rapid testing
for different applications. By changing the sample rate, the total number of samples taken, and the processing algorithm,
we can achieve almost any desired modulation. Oversampling
and undersampling are among the standard methods for demodulation algorithms.

no. 4, pp. 395-403, Apr. 1982.
[2] E. Y. Robinson, " British Patent No.201,591, 922, " 1922.
[3] F. M. Colebrook, " Homodyne, " Wirel. World Radio Rev., vol. 13,
pp. 645-648, 1924.
[4] C. R. Cosens, " A balance-detector for alternating-current
bridges, " Proc. Phys. Soc., vol. 46, no. 6, pp. 818-823, Nov. 1934.
[5] D. P. Blair and P. H. Sydenham, " Phase sensitive detection as a
means to recover signals buried in noise, " J. Phys. E., vol. 8, no. 8,
pp. 621-627, Aug. 1975.

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