Instrumentation & Measurement Magazine 25-5 - 54

capacitors placed on top
of and below the package
are known as the die
side capacitors (DSC) and
landside capacitors (LSC),
respectively.
Fig. 2 shows the lumped
Fig. 1. Server platform and its corresponding power delivery network.
◗ Socket - This is the component that interconnects the CPU
package to the motherboard. In some scenarios, the package
can be connected directly to the motherboard without
the need for a socket.
◗ Package - This component provides a way for power to be
delivered to the CPU die and also enables the CPU die to
communicate with other system components.
◗ Decoupling capacitors - When the VRM is unable to
respond to the current demands of the CPU, the current
must be supplied by alternative sources. Decoupling
capacitors act as temporary charge reservoirs for the
CPU die when undergoing a transient load event. The
circuit model of the server
platform power delivery
network (PDN). The decoupling
capacitors (C)
are distributed across the
motherboard and package
to serve as intermediary
charge reservoirs to power
the CPU die. Both the
motherboard and package
have their own inherent
parasitic inductance (L)
and resistance (R).
The dc source represents
the VRM. The bandwidth
of the VRM is typically
between one and several
hundreds of kilohertz, depending
on the controller.
The VRM can regulate the
output voltage within its
control loop bandwidth,
but above this bandwidth,
the VRM becomes high impedance,
and the PDN has
to be designed to mitigate
this high impedance. The
frequency response of the
server platform PDN and its associated transient behavior are
shown in Fig. 3. At low frequencies, the impedance of the PDN
is dominated by the motherboard parasitics and decoupling
capacitances (Lboard
and Cboard), and as frequency increases, the
decoupling capacitors on the package (Cpackage) become effecFig.
2. Lumped circuit model of the server platform PDN.
54
tive to reduce the impedance. As frequency further increases,
the inductance of the motherboard, package and its decoupling
capacitors begin to dominate again until the CPU die capacitors
become effective and lower the impedance. The combined
effects of the PDN parasitics results in two peaks called antiresonances.
In a server platform power delivery design, the goal
is to minimize the peaks as much as possible as they impact the
transient performance of
the system. Higher peaks
result in larger voltage
droop behavior which can
cause the voltage required
at the CPU die to fall out of
specification, resulting in
CPU performance degradation
or failure.
IEEE Instrumentation & Measurement Magazine
August 2022

Instrumentation & Measurement Magazine 25-5

Table of Contents for the Digital Edition of Instrumentation & Measurement Magazine 25-5

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