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Fig. 3. Frequency (above) and transient (below) responses of the server
platform PDN.
Server Platform PDN Modeling
To effectively design server platform power delivery, it is
important to model the server platform PDN to perform simulations
and predict CPU performance to different workloads.
Workloads refer to the different applications that can run on
a CPU, e.g., database workloads, memory workloads or input/output
workloads. Modeling the server platform PDN
also allows correlation to be performed to ensure confidence
in models. It also enables the discovery of inadequacies in the
power delivery networks, such as insufficient decoupling capacitors
or excessive board or package parasitics. There are
several approaches to model the server platform PDN including:
the Partial Element Equivalent Circuit (PEEC) Method [4],
which models the PDN magnetic fields as inductances and
PDN electric fields as capacitances; and full wave electromagnetic
solvers. Full wave electromagnetic solvers use methods,
such as finite element method (FEM) [5], Method of Moments
(MOM) [6], or finite difference time domain (FDTD) [7] to
solve Maxwell's equations to obtain the characteristics of the
PDN. The process of server platform PDN modeling is summarized
as follows:
◗ Determination of the inputs and outputs of the PDN
including the VRM as an input and the CPU die as an
output
◗ Extraction or characterization of the PDN using applicable
modeling methodology, e.g., full wave solvers
◗ Conversion of extracted parameters into a format that
is Simulation Program with Integrated Circuit Emphasis
(SPICE) compatible. If the PDN model is extracted
using full wave solvers, then the scattering parameters
that characterize the system [8], [9] can be transformed
into electrical macromodels for circuit simulations. These
macromodels are generated using software that converts
N-port network scattering, admittance, or impedance
parameters into macromodels of lumped multi-port
structures that can be used in time domain simulations.
These structures contain the parasitics of the PDN.
August 2022
Validation and Measurement
Before achieving good model correlation for prediction purposes,
laboratory measurements are needed for validation.
Validation can be done pre-silicon, that is before the CPU die
is introduced on the server platform or it can be done postsilicon,
this is with the CPU die on the platform. Pre-silicon
validation is done to validate the performance of the voltage
regulator modules on the platform and also helps validate
the server platform design to ensure that decoupling capacitors
are adequate, and the motherboard parasitics are low
enough for good performance. It also helps give a general
idea of the platform performance to different load transient
events, helping identify any platform problems and mitigate
them as soon as possible. Pre-silicon validation also provides
measurements inputs for correlation purposes. The motherboard
and VRM are the only server platform components
under test during pre-silicon validation; therefore, validation
for frequencies above 1 MHz do not provide useful
information since above this frequency range, and the CPU
package and die (which are absent on the platform during
the pre-silicon validation) portion of the PDN are dominant.
There are two methods for validating the server platform
during pre-silicon validation, i.e., ac impedance measurements
and transient measurements. Although ac impedance
measurements validate the power delivery network impedance,
they do not give any insight into the dynamic transient
load behavior that gives rise to voltage droops and overshoots.
Transient measurement involves the use of a device
called voltage regulator test tool (VRTT) [10] for pre-silicon
validation. A VRTT is a device that gets plugged into the
socket via an interposer onto the motherboard. The VRTT
tool is connected via a male-to-male header to the interposer.
The interposer can be clamped down in the processor socket
or soldered directly onto the motherboard. The VRTT tool
has complex circuits that generate transient load current profiles
into the system. It also has voltage and current sensors
whose values can directly be read from the VRTT software
interface on the computer. Transient performance, i.e., voltage
droops or overshoots, can be predicted using this device.
For pre-silicon validation, the test setup shown in Fig. 4a is
used. This test setup shows two separate socketed motherboards
with different board configurations, such as different
decoupling capacitor solutions, undergoing a VRTT measurement.
Each motherboard has two sockets with a VRTT
plugged into one of the sockets.
The VRTT measurement setup is comprised of the motherboard,
power supply for motherboard and VRTT, socket,
interposer (mimics the CPU package and connects VRTT to
the socket), VRTT tool, measurement equipment and a computer
with the VRTT associated software. The VRTT software
automates collection of the server platform measurement
data and incorporates a waveform viewer and scripts for test
automation. Automation software tests can perform a threedimensional
(3D) transient sweep. A 3D transient sweep is a
sweep of a load's current duty cycle (e.g., 10-90%), frequency,
and a predetermined current step and slew rate, which can
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