Evaluation Engineering - 18


Sponsored by

Samtec Bulls Eye
high-performance test

simulations and real-world communications-all of that within a realistic equipment budget.
Burns, Samtec: Most IC/connector evaluation boards feature a number of discrete
SMAs that high-performance signals
route to for connectivity to test equipment. The Bulls Eye high-performance
test system improves density 4:1 over
discrete SMAs and enables smaller evaluation boards with shorter trace lengths.

Digital communications standards
Are any emerging digital communications standards presenting significant
test-and-measurement challenges that
you can help your customers address?
Asay, Keysight: There are a couple of
unique problems that we help to solve.
First, for DDR5, the eyes are fully closed,
which has never happened in a memory
before-meaning that for the first time,
equalization must be utilized to open
the eye. Once equalization is used, then
it must be "tuned" to find the optimal
equalization setting for the receiver. We



provide a fully automated Rx calibration
system for DDR5. While PCI Express Gen6
is just beginning, it will represent the first
time many of today's high-speed digital
engineers use PAM4 signaling. We offer a
full suite of tools aimed at PAM4 for both
the receiver and the transmitter. Finally,
as the world moves to 800-Gb/s signaling, the baud rates are moving above 100
Gbaud. This is fast. Designers need a way
to see how good their device is doing under these circumstances. Keysight is the
only vendor to provide error detection
above 100 Gbaud.
Smith, Pico Technology: Emerging standards are always more challenging to
implement that the previous ones! Digital
designers are increasingly using tools that
were previously the preserve of RF and
microwave engineers to get the job done.
The best example is the use of a vector
network analyzer for channel characterization with S-parameter measurements.
Previously they were using exclusively
time-domain tools such as a TDR. VNAs
have higher dynamic range of 118 dB or
more, which is important for low-voltage

transmission standards that have very
tight noise margins.

Key trends
What key trends in high-speed digital test
have you seen over the past year, and what
trends do you expect to see in 2020?
Asay, Keysight: The biggest trend was
move to Gen5 for PCI Express and DDR.
As we move into 2020, USB will become
the focus again as USB 4.0 begins to take
over. As you look beyond 2020, PAM4 begins to enter the HSD test area. From the
testing side, we are seeing a trend to speed
up the test automation. This is critical
given the need for companies to get to
market faster.
Smith, Pico Technology: The past year has
thrown up a few new challenges with applications that demand deep understanding of timing and phase-noise characteristics. The 9404 SXRTO's address that with
a full suite of automated measurements
with statistics.

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Evaluation Engineering

Table of Contents for the Digital Edition of Evaluation Engineering

Editorial: Machine learning boosts electrolyte search
By the Numbers
Industry Report
Vector Network Analyzers: From on-wafer test to breast-cancer detection
High-Speed Digital: Mentor targets hierarchical DFT and automotive safety
Compliance: Conformance and cooperation move 5G forward
Design Automation: EMA Design Automation's Marcano looks to the future of PCB EDA
Tech Focus
Featured Tech
Robotics: Robotics forge their way into the 21st century
Evaluation Engineering - Cover1
Evaluation Engineering - Cover2
Evaluation Engineering - 1
Evaluation Engineering - By the Numbers
Evaluation Engineering - 3
Evaluation Engineering - Industry Report
Evaluation Engineering - 5
Evaluation Engineering - Vector Network Analyzers: From on-wafer test to breast-cancer detection
Evaluation Engineering - 7
Evaluation Engineering - 8
Evaluation Engineering - 9
Evaluation Engineering - 10
Evaluation Engineering - 11
Evaluation Engineering - 12
Evaluation Engineering - 13
Evaluation Engineering - 14
Evaluation Engineering - 15
Evaluation Engineering - 16
Evaluation Engineering - 17
Evaluation Engineering - 18
Evaluation Engineering - High-Speed Digital: Mentor targets hierarchical DFT and automotive safety
Evaluation Engineering - 20
Evaluation Engineering - Compliance: Conformance and cooperation move 5G forward
Evaluation Engineering - 22
Evaluation Engineering - 23
Evaluation Engineering - Design Automation: EMA Design Automation's Marcano looks to the future of PCB EDA
Evaluation Engineering - 25
Evaluation Engineering - Tech Focus
Evaluation Engineering - 27
Evaluation Engineering - Featured Tech
Evaluation Engineering - 29
Evaluation Engineering - 30
Evaluation Engineering - 31
Evaluation Engineering - Robotics: Robotics forge their way into the 21st century
Evaluation Engineering - Cover3
Evaluation Engineering - Cover4