Evaluation Engineering - 16

AUTOMATED TEST

AUTOMATION BOOSTS ANALOG AND
DIGITAL TEST OF AUTOMOTIVE ICS
By Lee Harrison, Mentor, A Siemens Business
The amount of electronic content in
passenger cars continues to grow rapidly, driven mainly by the integration of
various advanced driving and safety features. The industry's move towards fully
autonomous vehicles promises to even
further increase the number of these advanced features and thus electronic content. What's more, these components are
becoming increasingly complex. The frontier for sophisticated semiconductors is
found in the chips needed to execute artificial intelligence algorithms that govern
emerging self-driving capabilities.
It is critical that these safety-related devices adhere to the highest possible quality and reliability requirements. These
requirements are formalized in the ISO
26262 standard that covers all aspects of
safety and quality for both the hardware
and software, from design through testing
and in-field operation.
More specifically, test for both large
and small automotive ICs comes with
these general requirements:

* Ability to detect errors in real time
that could affect the safe operation
of the system
* Very high defect coverage for manufacturing test to get single-digit
DPPB (defective parts per billion)
To manage the new quality and insystem test requirements, as well as the
ever larger designs that stress the design
tool infrastructure and in-house compute
resources, leading automotive IC makers
are quickly adopting scalable design-fortest (DFT) architectures.
So what does a scalable DFT architecture and flow for large automotive ICs
look like? The requirements for a DFT
architecture are different depending on
whether the IC is used for passive operations like display, infotainment, e-mirror,
or proximity warning, or for more active
operations like automatic-braking or
smart cruise control.
It is essential that semiconductor
companies deploy an automotive DFT
architecture that it is scalable. It should

support both the smaller sensor devices,
right up to and including large AI devices
used for processing the huge amount of
data created in an autonomous vehicle
environment. Mentor's Tessent solutions
are equally suited and relevant across this
range of design types, ensuring that automotive semiconductor companies can
invest in one scalable solution. Mentor has
worked with a number of semiconductor companies making automotive ICs to
build scalable DFT architectures.

Ensuring system reliability
with in-line self-test
One approach to ensuring the reliability of
a vehicle's electronics is to perform periodic testing during functional operation.
Designers can implement an architecture
to provide system-level low latency access
to all on-chip test resources for on-line test.
In addition to these low latency access
mechanisms, the entire test architecture
is based on the IEEE 1687 (IJTAG) industrystandard architecture (Figure 1). An IEEE

Figure 1: IJTAG- based
Tessent MissionMode
architecture.

EVALUATION ENGINEERING NOVEMBER 2019

Evaluation Engineering

Table of Contents for the Digital Edition of Evaluation Engineering