JED - February 2015 - (Page 35)

TECHNOLOGY SURVEY A SAMPLING OF ANALOG-TO-DIGITAL CONVERTERS AND A/D CARDS By Ollie Holt This enabled EW companies to develop 500-MHz Instantaneous Bandwidth (IBW) receivers. Recently even faster sampling A/D converters have become available at up to 4 GHz sampling rates, driving the IBW from 500 MHz towards 1.5 to 2 GHz. THE SURVEY In the survey table, two of the more important specifications are the number of bits of resolution and the effective number of bits (ENOB). Note that these numbers are not the same. The number of bits defines the resolution of the device. An eight-bit device quantizes the input into 256 unique steps, whereas a 12-bit device would quantize the same input into 4,096 unique steps. The greater the number of bits, the more information contained in the sampled data - plus the greater the number of bits provides some improvement in Spur Free Dynamic Range (SFDR). The effective bits or ENOB defines the number of bits that actually contain useful information. The reason the ENOB does not equal the actual number of bits is because the A/D performance is degraded by noise distortion. The ENOB can be approximated using the theoretical Signal-toNoise (SNR) of the A/D and the following equation: ENOB = (SNR-1.76dB)/6.02. So what is the advantage of more bits if the ENOB for an 8-bit A/D and the ENOB for a 10-bit A/D are both around 7.5? The advantage is that the 10-bit device probably will not need dithering, and it will usually have a better Spur Free Dynamic Range (SFDR). Dither is the addition of noise into the input of the A/D to make the Least Significant Bit (LSB) of the A/D toggle. It may sound strange, but adding enough noise to keep the LSB toggling actually improves device performance. An A/D with two or three more bits of resolution than the ENOB does not need external dithering, since the quantization level will be randomized by its internal noise. The next column in the survey indicates the unit's the sample speed. The sample speed defines the maximum rate at which the A/D converter can be operated without distortion in the measurements. It can be operated at slower clock rates, but the vendor does not support faster rates. Input Bandwidth defines the input frequency bandwidth limit. The SFDR defines the range between the power level of the highest spur and the maximum input level. In the April JED, our next survey will look at Low Noise Amplifiers. The Journal of Electronic Defense | February 2015 The Journal of Electronic Defense | February 2015 T his JED survey reviews both analog-to-digital (A/D) converter components and A/D modules. Components can be configured by designers into a module that meets users' requirements while the A/D modules can be designed to a set of common/standard requirements that could be used by many different system concepts. Since JED last reviewed them the technology has improved, offering more bits (12 or more) and higher sampling speeds (3-4 GHz). What are A/D converters? An A/D converter is a device that converts an analog value into a digital value. If the signal is a time-variant continuous signal and the A/D is set to sample at a periodic rate, the result is a set of digital sampled values that represent the signal's amplitude at each of the sample times. These periodically sampled digital values can than be processed using Fourier transforms or other methods to obtain useful signal information. This information can be just the external parameters of the signal, such as frequency and amplitude, or internal signal information, such as phase or frequency modulation or coding. With the development of high-speed A/D converters, RF input signals can be sampled and converted to digital data that can than be processed in a computer or Field Programmable Gate Array (FPGA). The result is the ability to provide improved performance over analog receivers at reduced weight and size and easy reconfigurability. The improved performance provides the ability to capture additional signal information that was not easily measured by analog methods. With both new anti-jam radar waveforms and new communication signals modulation techniques, the addition of digital signal processing to recover embedded modulations enabled EW systems to develop jamming techniques and communication demodulation techniques to recover the embedded information. The A/D also has enabled Digital RF Memory (DRFM) systems to sample an incoming radar waveform, for example, and then coherently repeat that signal with jamming at random, reducing pulse Doppler radar performance. A/D converters were first introduced into EW systems in the lower frequency regions to process communication signals where narrow-bandwidth multiple channel systems were required. Eight- to 14-bit A/D converters that could sample at rates up to around 500 MHz provided the technology to easily meet those needs. Further development yielded higher-sampling-speed A/D converters that sampled at speeds around 1.5 GHz with eight bits of resolution. 35

Table of Contents for the Digital Edition of JED - February 2015

The View From Here
Conferences Calendar
Courses Calendar
From the President
The Monitor
World Report
Maritime SIGINT: Shipborne Ears for the “Five Eyes”
Technology Survey: Analog-to-Digital Converters
EW 101
AOC News
Index of Advertisers
JED Quick Look

JED - February 2015