JED - February 2016 - (Page 33)
A SAMPLING OF FPGA BOARDS FOR EW AND SIGINT APPLICATIONS
By Ollie Holt
Figure 1: Early example of Configurable Logic Blocks (CLBs).
As CLB operations became more complex with advancing
technology, most CLB operations were replaced with Look Up
Tables (LUTs). The contents of the LUTs are set up within the
FPGA at power up and these contents define the desired output
of the CLB. The exact numbers and features of CLBs are different in different devices, but every CLB contains a configurable
input switch matrix, programmable logic, arithmetic functions, shift registers, and LUTs and/or RAM.
FPGAs provide support for many different types of input
and output (I/O) standards. The I/O of an FPGA is typically
grouped in banks designed to support different I/O standards.
Typical FPGAs provide several of these banks. Today's FPGAs
also have memory and can contain multiple Power PC cores, or
more popular processing cores such as the MicroBlaze or NiosII. A "core" is a predefined complex function used in making
an FPGA. Most FPGA suppliers have libraries of these cores for
any user of their product and cores are also available for purchase from most third-party vendors or via "open source."
In selecting an FPGA, the major things to look for include
the number of logic cells, the number of digital signal processors (DSPs), whether the FPGA can be used for signal processing, the amount of memory available, and the I/O types
implemented. The first survey item is the board function.
Here, the user will need to determine if the FPGA board provides enough logic cells, DSPs, user memory, and I/O types to
match design needs. Additionally, the board may contain other
support circuits that do not have to be provided by additional
modules such as analog-to-digital converters (ADCs), digitalto-analog converters (DACs), and processors.
The next column defines the type of FPGA and any additional processors included. Defining the FPGA board type
aids in determining how much capability the board may support and allows the user to search for available "cores" that
may support the desired application.
Next, the memory column should be examined in two
ways: some boards will have both the memory contained on
the FPGA and additional on-board memory, while others may
just list the additional memory on the board. The format column defines the board size and whether the board complies
with a standard format. The second part of the complete system equation is the bus format. This question is addressed in
the column defining bus and I/O types available. The final
columns define the operational environment for the board
and power consumption.
Another item that must be considered when selecting an
FPGA for your design is the support tools. The major FPGA manufacturers provide tools and evaluation kits for simulating and
modeling your design. Select an FPGA family that has the tools
that support your design needs and also check the availability
of "cores" that can make the design effort easier.
JED's March Survey will cover microwave power modules
(MPMs), traveling wave tubes (TWTs) and TWT amplifiers (TWTAs).
The Journal of Electronic Defense | February 2016
his month's JED survey looks at Field
Programmable Gate Array (FPGA) boards for
electronic warfare (EW) and signals intelligence
(SIGINT) applications. With the ever-increasing
use of FPGAs to simplify system design, many
companies provide multifunction FPGA boards in
typical Commercial-off-the-shelf (COTS) form factors. These
COTS boards are being used frequently in EW systems due
to their wide availability, programmability and versatility.
Before discussing complete FPGA boards though, let's take
a closer look at FPGAs. An FPGA is a semiconductor chip that
contains many programmable logic components that can be
interconnected as needed by the EW system designer to perform whatever function is needed. These programmable logic
components can either be Configurable Logic Blocks (CLBs) or
Logic Array Blocks (LABs). CLBs are the basic building blocks of
an FPGA. A simple diagram of an early CLB is shown in Figure
1. By combining groups of CLBs, a set of logic functions can
be created to generate a desired output. The switches between
each CLB determine what inputs are used and where outputs
Table of Contents for the Digital Edition of JED - February 2016
The View From Here
From the President
Alternatives to Positioning, Navigation and Timing
Future Operating Environment 2035
Technology Survey: FPGA Boards
The Heat is On
Index of Advertisers
JED Quick Look
JED - February 2016