Trimmer for Frequency TAF-DPS BJT Sensor Thermistor Sensor TDTS Sensor Crystal Sensor f~T Lookup Table F Conversion fc Temperature Monitor Compensated fs Uncompensated XO Figure 20. TAF-DPS as a frequency trimmer in temperature compensation. Uncompensated Third Overtone fs F fb f1 Control Word Generator Counter Mixer SC-Cut Crystal TAF-DPS I3 Dual-Mode Oscillator Fundamental f3 f3 Compensated Temperature Sensor ASIC (SoC) Figure 21. Self-temperature-sensing and TAF-DPS: MCXO. An Electric System (A Node in a Network) At Higher Stratum Level each node. With the introduced TAF-DPS syntonization method, it is expected that a better synchronization precision and accuracy for the whole network can be achieved. It is desired that this function of "TAF-DPS inside" be incorporated in all future electronic devices so that each node's operating frequency can be adjusted conveniently, for the sake of better time synchronization quality (the next goal is into nanosecond regime) and whatever other purposes (the on-chip TAF-DPS clock circuit can be useful to many things other than just time synchronization [51], [52]). XO VI. Conclusion A new perspective of tuning clock PRC (e.g., Atomic hardware's frequency in real time Signal Standard) Bit Stream for assisting network time synPacket chronization is introduced. An Slave Clock Slave Clock on-chip integrated syntonistor Frequency is suggested to realize this viTime Code Distribution Generator sion. A method is proposed for utilizing this syntonistor in synchronization process. This work f 1 f2 fx To Lower or is a response to one of the chalSame Stratum Level lenges raised in TAACCS. It presents an innovative solution that Figure 22. The scheme of incorporating TAF-DPS syntonistor in all the nodes of a specifically addresses the evernetwork. important time synchronization problem in all kinds of networks. time information is passed from a higher stratum level The key novelty lies in the fact that it allows high-level (e.g. the golden reference). It can be in the format of algorithm to directly tune each communicating node's either electrical signal, CBR bit stream or packet data clock frequency. By enabling on-chip periodical syntoniwith time code. The extracted frequency or timing in- zation, the quality of network time synchronization can formation will be used to direct the TAF-DPS circuit in be improved. ASIC (SoC) F (With On-Chip TAF-DPS Circuit) SECOND QUARTER 2020 IEEE CIRCUITS AND SYSTEMS MAGAZINE 27