IEEE Circuits and Systems Magazine - Q2 2020 - 45

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- artially deals with this by addressing the probp
lem of mapping data to a high-dimensional space.
Similarity measurement: Though cosine similarity and Hamming distance are currently widely
used, new metrics should be developed that are
hardware-friendly and can lead to high accuracy.
Multiple class hypervectors: Traditional classifiers use multi-dimensional features to train a classifier. Often ranking can be used to select a small
number of features out of many features [78]. It is
possible that multiple class hypervectors, similar
to multiple features in traditional classification,
can be generated to represent a class in HD classification. Subsequently, multiple query hypervectors will need to be compared with their corresponding class hypervectors for each class. This
is a topic for further research.
Accuracy improvement: Strategies like retraining
should be explored to further improve the accuracy of HD computing.
Hardware acceleration: Rebuilding the specific
implementation for HD computing to store and
manipulate a large amount of hypervectors may
result in high speed and energy efficiency. Moreover, inspired by [32], which discusses tradeoffs
related to the density of hypervectors, a choice
between dense and sparse approaches should be
accordingly made based on the application scenarios. For example, adopting sparse representation requires lower memory footprints.
General HD computing processor: Inspired by
[13], addressing different types of data with only
one general processor containing a large wordlength ALU is of great interest.
Hybrid systems: Hybrid systems are partially
based on HD computing and partially on conventional machine learning. Only a few examples exist so far [79]-[82]. Further research on this topic
can be explored in future.

V. Conclusion
This paper has summarized the fundamental arithmetic operations for the emerging computing model of HD computing that might achieve high robustness, fast learning ability,
hardware-friendly implementation, and energy efficiency.
Mathematically, HD computing can be viewed as an alternative in dealing with machine learning problems. Though
in its infancy, HD computing shows its potential to be used
as a light-weight classifier for applications with limited resources. This model can achieve outstanding classification
performance for certain problems like DNA sequencing.
Balancing the tradeoff between accuracy and efficiency is
an important area of research. Improvements include but
SECOND QUARTER 2020

are not limited to encoding, retraining, non-binary model
and hardware acceleration. HD computing sometimes
leads to outstanding classification accuracy, while sometimes achieves acceptable accuracy but high efficiency.
Thus, users need to evaluate whether HD computing is suitable for their application. Additionally, HD computing can
be used in applications such as seizure detection, speech
recognition, character recognition and language detection.
More "cognition" aspects of HD computing, including analogical reasoning, relationship representation and analysis,
will need to be further developed in the future.
Acknowledgment
This paper has been supported in parts by the NSF
under grant number CCF-1814759 and by the Chinese
Scholarship Council (CSC). The authors thank all four
reviewers for their numerous constructive comments
and suggestions.
Lulu Ge received the B.S. degree from
Nanjing University of Posts and Telecommunications (NJUPT), Nanjing, China, in 2015, the M.S. degree from the
Southeast University, Nanjing, China, in
2018. She is currently pursuing the Ph.D.
degree of electrical engineering at University of Minnesota, Minneapolis, MN, USA.
Keshab K. Parhi received the B.Tech.
degree from the Indian Institute of Technology (IIT), Kharagpur, in 1982, the
M.S.E.E. degree from the University of
Pennsylvania, Philadelphia, in 1984, and
the Ph.D. degree from the University of
California, Berkeley, in 1988. He has been with the University of Minnesota, Minneapolis, since 1988, where he
is currently Distinguished McKnight University Professor and Edgar F. Johnson Professor of Electronic Communication in the Department of Electrical and Computer Engineering. He has published over 650 papers, is the
inventor of 31 patents, and has authored the textbook
VLSI Digital Signal Processing Systems (Wiley, 1999). His
current research addresses VLSI architecture design of
machine learning systems, hardware security, data-driven neuroscience and molecular/DNA computing. Dr.
Parhi is the recipient of numerous awards including the
2017 Mac Van Valkenburg award and the 2012 Charles A.
Desoer Technical Achievement award from the IEEE
Circuits and Systems Society, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, and a Golden Jubilee medal
from the IEEE Circuits and Systems Society in 2000. He
served as the Editor-in-Chief of the IEEE Trans. Circuits
and S
- ystems, Part-I during 2004 and 2005. He was elected
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