Content Gazette - February 2017 - 36

SiPS 2017

Preliminary Call for Papers

IEEE Workshop on Signal Processing Systems
Lorient, France, Oct. 3-5 2017
www.sips2017.org

General Chairs:
Ph. Coussy, U. Bretagne Sud, FR
W. Gross, McGill U., QC, CA
Program Chairs:
J. Takala, Tampere U. Tech., FI
A. Burg, EPFL, CH

Paper submission deadline (tentative) : May 1st 2017
Acceptance notification (tentative):
July 30th 2017

Finance Chairs:
G. Gogniat, U. Bretagne Sud, FR
M. Mattavelli, EPFL, CH

IEEE SiPS is a premier international forum collecting researchers and practitioners from industry and
academia for exchanging the latest scientific and technical advances in the area of design and
implementation of signal processing systems. It addresses current and future challenges and new
directions in research and development of these systems. Prospective authors are invited to submit
manuscripts on topics including, but not limited to:

Local Arrangements Chairs:
C. Chavet, U. Bretagne Sud, FR
J. Laurent, U. Bretagne Sud, FR
Publication and publicity chairs:
C. Jego, Bordeaux INP, FR
V. Lapotre, U. Bretagne Sud, FR
Special sessions chair:
E. Boutillon, U. Bretagne Sud, FR
Industrial liaison chairs:
K. Benkrid, ARM, UK
X. Zhang, SanDisk, US
Demo night chair:
M. Raulet, ATEME, FR

Software Based Design and Implementation
of Signal Processing Systems
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Hardware Based Design and Implementation
of Signal Processing Systems
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Web site:
K. Martin, U. Bretagne Sud, FR

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Asian liaison:
A.-Y. (Andy) Wu, NTU, TW

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North-America liaison:
J. Cavallaro, Rice U., TX, US
Sponsored by:
IEEE Signal Processing Society
IEEE Circuits and Systems
Society

Software solutions on programmable digital
signal processors and systems
Application specific instruction-set processor
(ASIP) architectures and systems
SIMD, VLIW and multi-core CPU architectures
Graphics processing unit (GPU) based massively
parallel implementations
Embedded FPGA architectures

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Low-power signal processing circuits and
applications
High performance VLSI systems
VLSI designs for 100 Gbps and beyond
networking systems
FPGA and reconfigurable architecture based
systems
System-on-chip and network-on-chip
VLSI systems for wireless sensor network and RF
identification systems

Emerging Technologies
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Vehicular ad hoc networks (VANET)
Cognitive radio networks
Internet of Things (IoT)
Deep learning and reconfigurable/ASIC
processors
Bio-inspired networks
Context-aware mobile networking
Wireless body area networks (WBANs)
Implantable communications
Tele-medicine/e-health networks

Signal Processing Application Systems
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Audio, speech and language processing
Biomedical signal processing and bioinformatics
Image, video and multimedia signal processing
Information forensics, security and cryptography
Machine learning for signal processing
Sensing and sensor signal processing
Autonomous energy harvesting-based sensor
networks
Signal processing for non-volatile memory
systems
Latency and power constrained signal processing
techniques for high-speed networking
Wireless communications and networking
Coding and compression
Multiple-input-multiple-output (MIMO) and
communication systems
Software defined radio

Signal Processing Compensation Techniques
for Mixed-Signal Technologies
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Digital compensation techniques for variations in
silicon process, temperature, aging
Error detection and correction for volatile and
non-volatile memories
Power reduction and SNR improvement for onchip, off-chip interconnects and buses
Digital compensation signal processing for ADCs,
power-amps, MEMS, power controllers

Design Methods of Signal Processing
Algorithms and Architectures
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Optimization of signal processing algorithms
Compilers and tools for signal processing systems
Algorithm transformation and algorithm-toarchitecture mapping
Dataflow based design methodologies
Error-tolerant techniques for signal processing

Paper Submission: Authors are invited to submit full-length (max. 6 pages), original, unpublished papers. Previously published papers
or papers currently under review for other conferences/journals should not be submitted and will not be considered. Paper format
information is available at www.sips2017.org.
IEEE SiPS 2017 has a special theme: "Reliable signal processing systems". Future Signal Processing applications and systems will
have to consider reliability in addition to pursuing optimal performance. Submissions that fall into this inter-disciplinary area are
particularly encouraged.
www.signalprocessingsociety.org

[36]

FEBRUARY 2017


http://www.sips2017.org http://www.sips2017.org http://www.signalprocessingsociety.org

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