IEEE Solid-States Circuits Magazine - Fall 2020 - 90

the inductance but in a much weaker
fashion than the solenoid's case.
Planar inductors are built on top
of a substrate that is typically fairly
conductive [16] - [19]. Hence, as
sketched in Figure 5, there is a para-
sitic capacitance between the induc-
tor traces and the substrate that
adds up to the parasitic capacitance
from trace to trace. Overall, we can,
in a simplistic way, lump all of these
contributions in a single parasitic
capacitance, C par , that shunts the
terminals of the (lossy) inductor, as
exhibited in Figure 5. At frequencies
higher than the self-resonance fre-
quency ~ srf = 1/ LC par , the induc-
tor is not an inductor any more but
rather becomes a capacitor. Since
the parasitic capacitance is approxi-
mately proportional to the induc-
tance value, ~ srf is approximately
inversely proportional to L . In any
circuit, we want the operation fre-
quency to be a fraction of ~ srf, such
that there is a maximum value of
inductance, L max , that can be used
for any given operation frequency.
Moreover, using large inductances
progressively becomes more and
more difficult at higher frequencies,

since L max decreases, as discussed,
with frequency.
At higher frequencies, integrated
inductors experience other issues.
As the frequency of operation, ~ 0,
increases, the current is no longer
uniformly distributed in the coil traces
but tends to flow through a thin region
near the trace surface (skin effect).
This results in an increase of the trace
resistance in a fashion approximately
proportional to ~ 0 . Moreover, the
current tends to flow along the least
inductance path, crowding at the
inner side of the coil, further increas-
ing the trace losses. The capacitive
coupling to the substrate results in
currents flowing in the substrate too,
which increases the overall power dis-
sipation in the inductor. A similar phe-
nomenon is related to the magnetic
coupling to the substrate, with eddy
currents induced in the substrate. In
general, substrate losses are more rel-
evant for larger inductors, i.e., roughly
for those with a ~ 0 /~ srf ratio larger
than 1/4.
In the preceding discussion,
we pointed out that a magnetic
transformer is nothing but two
coupled inductors. In an integrated

R
Cpar
L

FIGURE 5: A sketch of a planar inductor over a fairly conductive substrate and the inductor's equivalent circuit.

(a)

(b)

(c)

FIGURE 6: Layout options for planar integrated transformers: (a) stacked, (b) coplanar interwound, and (c) concentric coplanar.

FA L L 2 0 2 0

IEEE SOLID-STATE CIRCUITS MAGAZINE

fashion, there are a few different lay-
out options to realize a planar trans-
former, as illustrated in Figure 6 [16],
[17], [20], [21]. The first possibility is
a stacked layout. This arrangement
allows one to obtain a relatively large
magnetic coupling ^k = 0.6, 0.8h,
which, however, comes at the price
of a relatively large parasitic capaci-
tance between the primary and sec-
ondary coil. Moreover, one coil has
to be implemented in a lower metal
layer, which might be much thinner,
hence, impairing the quality factor
of the winding. To avoid this issue,
a coplanar interwound layout can
be used, implementing both the pri-
mary and secondary windings with
the same metal layer. This arrange-
ment, however, results in a some-
what smaller magnetic coupling
^k = 0.5, 0.7h . Another layout option
is the concentric coplanar layout,
where one coil sits entirely inside the
other. This layout minimizes the par-
asitic capacitance between the pri-
mary and secondary coils. However,
the magnetic coupling is the least
^k = 0.3, 0.5h among the analyzed
layout options, as the mutual induc-
tance is limited by the section of the
(inner) smaller winding.
As discussed, the requirements
for the desired magnetic coupling
influence the selection of the trans-
former layout. A larger value of k
trades off with larger capacitive
parasitics between the primary and
secondary coils. In integrated trans-
formers, typical achievable values
of magnetic coupling range from 0.2
to 0.8, which means that the leakage
inductance is never negligible. To
have a turn ratio n much larger or,
symmetrically, much smaller than
unity, we clearly need one inductor
to be much larger than the other.
This, however, brings about some
issues. Larger inductors have a lower
self-resonance frequency and more
substrate losses. Moreover, since
mutual coupling depends on the coil
with the smaller area, there will be
limited magnetic coupling if coils
have very different sizes. The result
is that typical achievable values of

IEEE Solid-States Circuits Magazine - Fall 2020

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