IEEE Solid-States Circuits Magazine - Winter 2022 - 56

Low-power circuit design is becoming
increasingly more sophisticated in all application
areas, from digital computation and machine
learning to analog design.
Audio amplifiers are coming alongside
high-end-audio DACs in terms of
DR and THD+N.
Power Management
Subcommittee Chair: Yogesh
Ramadass, Texas Instruments,
Santa Clara, California, USA
The diversity and wide scope of
power management applications and
techniques are evident in this year's
ISSCC submissions. Papers in the
power management sessions include
a broad range of applications, from
high-voltage line interface and bus
interface converters to fast, low-voltage
power delivery, wireless/isolated
power delivery, and envelope tracking,
energy harvesting, and other concepts.
The continued progression and
diversification of process technologies
used for power management ICs
are also highlighted. Papers showcasing
high-level gallium nitride (GaN)
integration, high-voltage SOI CMOS,
and deep submicron (4-nm) CMOS
represent efforts at opposite ends
of the voltage and conversion ratio
spectrum. New topologies and ar1.E+07
1.E+06
1.E+05
1.E+04
1.E+03
1.E+02
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chitectures
remain a theme at ISSCC
2022. Hybrid and resonant switchedcapacitor
converters continue to expand
in support of new applications
while also addressing key industrydriven
challenges, such as transient
performance, electromagnetic interference
(EMI), and system robustness.
Among the many new design concepts
and paradigms presented at
ISSCC 2022, a number of key trends
stand out, such as the following:
■ Power converters continue to
push toward higher switching frequencies
in the tens to hundreds
of megahertz to reduce passive
component sizes and achieve faster
transient responses.
■ Such high-frequency operation
is enabled by advanced process
technologies, such as GaN and
deep submicron CMOS (down to
4 nm) as well as new topologies,
multiphase operations, and gatedriving
techniques.
■ Hybrid and resonant switchedcapacitor
topologies continue to
diversify while addressing key application
spaces, including 48-to1-V
point-of-load conversion and
challenges related to regulation
and transient response.
■ Isolated and wireless power delivery
continue to be important drivers
for applications that demand
good efficiency, high common
mode transient immunity, and
EMI performance.
■ A range of emerging applications,
including novel energy harvesting
devices, battery system management,
and low-power Internet
of Things (IoT) devices and wearables,
creates opportunities for
new circuit architectures and control
strategies to address application-specific
challenges.
Data Converters
ISSCC 1997-2021
FOMw = 1 fJ/Conversion Step
FOMs = 185 dB
ISSCC 2022
10 20 30 40 50 60 70 80 90 100 110 120
SNDR at fin,hf (dB)
FIGURE 3: The ADC power efficiency (P/fsnyq) as a function of the signal-to-noise and distortion
ratio (SNDR). FOM: figure of merit.
56 WINTER 2022
IEEE SOLID-STATE CIRCUITS MAGAZINE
Subcommittee Chair:
Michael Flynn, University
of Michigan, Ann Arbor, USA
Data converters are a critical link between
the analog physical world and
the world of digital computing and
signal processing prevalent in modern
electronics. The need to faithfully
preserve a signal across domains continues
to pressure data converters to
deliver more bandwidth and linearity
while continuing to increase power
efficiency. This year, ISSCC not only
continues the trend of reporting highly
energy-efficient analog-to-digital
converters (ADCs) but also showcases
new and exciting converter architectures,
which open new possibilities
for data conversion.
Pipelined successive approximation
register (SAR) architectures are
pushing the speed limits of the current
state of the art in Nyquist converter
design, while incremental converters
are reaching new levels of efficiency.
In noise-shaping converter design,
delta-sigma and noise-shaping SAR
converters are continuing their prominent
role and show their strengths in
both high-efficiency and high-speed
data conversion. Figures 3-5 represent
traditional metrics that capture
the innovative progress in ADC
design. Figure 3 plots the power
dissipated relative to the Nyquist
sampling rate (P/fsnyq) as a function
P/fsnyq (pJ)
IEEE Solid-States Circuits Magazine - Winter 2022

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