IEEE Power Electronics Magazine - September 2021 - 32

was used. The 40 V rated, 3.6 mΩ EPC2055 was chosen
for the lower FETs Q2 through Q4, and the 100 V rated,
3.2 mΩ EPC2218 was selected for the upper FET. The typical
operating waveforms for the three-level converter are also
shown in Figure 1 for duty cycles below 50%.
An analysis of the converter based on the characteristics
of the chosen eGaN FETs revealed that the
optimal operating frequency for the converter lies in
the frequency range 350 kHz to 500 kHz, where the corresponding
frequency for the inductor will be 700 kHz
through 1 MHz and serves as the starting point for the
design of the inductor.
Inductor Design
The key elements for an inductor design are low ac and
dc losses, sufficient saturation and size. These requirements
are primarily driven by ripple and average current.
The basic rule for designing an optimal inductor
is to select a ripple current in the range of 20 to 30%.
Lower ripple current help reduce ac losses of an inductor,
but at the cost of its size, as higher inductance value
means bigger magnetics. Based on this an inductance
range of 1.5 µH through 3.2 µH will serve as the starting
point for the design for both the inductor and the threelevel
converter and using an iterative process between
the two blocks, the optimal inductor-converter design
can be achieved.
Conductor Selection
The core shape is driven by the interaction between flux
density and power loss within the operating frequency for
the core. The wire shape depends on the skin and proximity
losses in the windings and airgap. A thin inductor requires
thinner conductor and thinner core pieces, thus reducing
the core area of the inductor. A thinner area needs to be balanced
out with a smaller air gap or larger core. A tight tolerance
value for the air gap is necessary to achieve the desired
inductance value. The 3.5 mm total component thickness
constraint means that most, if not all, standard cores cannot
be used and forces the use of non-standard core shapes,
such as an E-I core combination.
Winding resistance is driven by cross-sectional area,
shape, conductor length and proximity effect. The thickness
constraint forces a wider conductor to achieve
the required resistance. The choice of core material,
in combination with the airgap, affects the number of
turns needed for the winding. Using equation 1, multiple
solutions that yield the same inductance by varying
the airgap, permeability, and number of turns can
be determined.
L=
n)) 2
l
AN
eff
(1)
Where:
A = Core area
N = number of turns for the winding
leff = effective length of core
µ = permeability of the core
L = Inductance
Using an iterative process, it is possible to derive a
design that meets most, if not all, of the requirements:
■
Inductance = 2.2 µH
■ Average Current = 12.5 A
■ Peak Current = 15 A
■ Maximum Height = 3.5 mm
■ DCR below 2 mΩ
For this design, a flat conductor was the best choice
as it is the most effective utilization of the available winding
window. In addition, only a few turns are necessary to
achieve the desired inductance. Another advantage of using
flat conductors is the reduced skin effect when compared to
round wires as the frequency is increased. The skin effect
3.5 mm
VIN Q1 Q4
Q1
Q2
Q1 = EPC2208
CBus
CFly
Q3
COut
Q4
2.5 mm
Q2, Q3, Q4 = EPC2055
GND
Current Ripple at 2. fsw
FIG 1 A three-level converter topology schematic (center) with GaN FETs (left) and typical operating waveforms when the converter
duty cycle is less than 50%.
32 IEEE POWER ELECTRONICS MAGAZINE z September 2021
IL
LOut
VIN - VFLYVFLY
Vsw
Q2 Q3
1.5 mm
2 mm

IEEE Power Electronics Magazine - September 2021

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