JED - November 2010 - (Page 34)

By Barry Manz The Field Programmable Gate Array (FPGA) as it applies to EW subsystems is very much like a sponge. Every new generation of FPGA, which appears every 18 to 24 months, typically provides twice the logic functions of its predecessor in the same sized package with roughly the same power consumption. It absorbs more and more of the tasks previously performed by other devices, ranging from discrete analog components to digital signal processors and general-purpose processors. Relying on their massively parallel architecture, today’s large FPGAs can be programmed to implement nearly every function of a basic ESM system, and when coupled with high-performance analog-to-digital and digital-to–analog converters (along with a smattering of RF components at the front end) a digital RF memory – in a single packaged device. Think of them as the Swiss Army Knife of the embedded computing industry. Xilinx and Altera are the two FPGA market leaders with Xilinx owning 5560 percent of the market and Altera 1520 percent. At Xilinx, revenues from the defense sector represent 15 percent of its business (of which EW is the greatest contributor), and 9-10 percent for Altera. This makes defense a significant FPGA market, even though the devices are used in many other applications as well. “It’s really no surprise,” said Amit Dhir, senior director for aerospace and defense & high performance computing at Xilinx, “because if you look at the volumes of devices required by EW, RWR, and radar systems, they’re not at the level where it’s desirable to use an ASIC. In fact, EW is the perfect intersection for FPGAs from both a volume standpoint and because of the types of things they can do. They’re a pretty natural fit as underlying technology for radar and EW.” THE FPGA DEFINED An FPGA consists of an array of configurable logic cells (logic blocks) and each cell can be configured, or programmed, to perform one of many functions. The difference between FPGAs and most other semiconductor devices is that rather than being endowed by their manufacturers with a specific function or functions, they are essentially a “blank canvas” when delivered to the designer, who must “paint” the desired functionality by programming it. This makes the FPGA an extraordinarily versatile device, as it can perform computing, signal processing and highspeed communication functions with little need for external resources. The individual cells within an FPGA are interconnected by a matrix of wires and programmable switches. The logic cells become building blocks from which virtually any type of functionality can be created, from simple-state machines to complete microprocessors. The ultimate functionality that an FPGA will perform is created by programming the logic cells and selectively closing the switches in the aforementioned matrix of interconnected wires, and then combining these blocks to create the desired result. Defining the characteristics of the huge number of connections and cell logic functions in an FPGA has traditionally been an immense task and has given them a reputation as being “a bear” to program. Of necessity, FPGA manufacturers and design software vendors have developed software tools that make the process less difficult. In addition, predesigned and verified intellectual property (IP) functional blocks are available from FPGA manufacturers and third parties to help speed the programming process. FPGAs have, throughout most of their history, been extremely well suited for performing fixed-point arithmetic rather than floating-point arithmetic. Fixed point is a number format where the binary point is in a fixed location using a fixed number of bits, one subset specifying the integer part and another specifying the fractional part. It is typically less expensive to execute in hardware and is more efficient than its floating-point counterpart, but this approach offers less dynamic range and requires values to be carefully scaled to avoid overflow or saturation. In contrast, in the floating-point format the position of the binary point “floats” depending on the magnitude of the number being represented. Floatingpoint arithmetic delivers high dynamic range and is very precise, but it comes with the caveat of being less frugal with power and more expensive to build. However, FPGAs are increasingly capable of performing both fixed- and floatingpoint arithmetic, which further increases their usefulness in defense systems. THE PATH TO THE FPGA This was not always the case. The FPGA was invented by Ross Freeman, the late co-founder of Xilinx, and the company’s first FPGA was introduced in 1985. It was an entirely new form of programmable logic, and it took a while for its potential to grab the full attention of designers throughout the electronics industry. At the time, Application-Specific Integrated Circuits (ASICs) and digital signal processor (DSP) chips, both of which were first offered in 1980, along with other types of logic, were the designer’s primary tools. Both the ASIC and DSP are still used in large numbers throughout the electronics industry. However, the ASIC is best suited for volumes much larger than those required for increasingly smaller defense systems, and the DSP’s functionality has been absorbed by the FPGA. The result has been an almost universal transition to the FPGA. Pentek’s story is fairly typical of how this transition was made by most

Table of Contents for the Digital Edition of JED - November 2010

JED - November 2010
Table of Contents
The View From Here
Calendar
From the President
Letters
The Monitor
Washington Report
World Report
Protecting Helicopters: Why ASE is About to Change the Game
The Rise... and Further Rise of FPGAs in EW
Physics of the Cyber-EMS Problem – Why We Have the Language Wrong
EW 101
AOC News
Index of Advertisers
JED Quick Look

JED - November 2010

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