IEEE Electrification Magazine - March 2020 - 30

5) Based on different load-to -generation ratios, different settings for the df/dt element could be used
for implementation. Even though this setting could
be torque controlled as a function of the load-togeneration ratio, field-implementation results
showed that a setting of 2.5 Hz/s is sufficient for
reliable and secure operation. This setting is negative if the load is greater than the generation and is
positive otherwise; this must be considered.

Synchrophasor-Based Islanding
Synchophasor-based islanding is one of the most reliable islanding-detection techniques, but it comes at a
high capital cost due to its requirement for communications-based infrastructure. Synchophasor-based islanding detection is based on three quantities: voltage
angle difference, slip frequency, and acceleration. The
voltage angle difference islanding-detection element is
based on the difference between the angles of positive
sequence voltage phasor elements, where one of the
elements is on the microgrid side and the other is on
the source side of the breaker or recloser that tripped.
The setting for the angle difference is based on the DER
output: 20° for DER > 500 kW, 10° for DER ! (500 kW-
5 MW), and 5° for DER # 500 kW. Slip frequency is
the rate of angle difference with respect to the time;

Acceleration (Hz/s)

2
Islanded
(Trip)

1
0
Islanded
(Trip)

-1

Grid
Connected
(Restrain)

-3
-2

-1.5

-1

-0.5 0
0.5
1
Slip Frequency (Hz)

1.5

Figure 6. The synchophasor-based islanding detection.

Time (p.u.)

1.2
81R
Synchophasor

1
0.8
0.6
0.4
0.2
0

0.2 0.4 0.6 0.8

1 1.2 1.4 1.6 1.8
PL/PG

Figure 7. The 81R versus synchophasor-based islanding detection.

upper line: y = -5x + 2.5,
25
lower line: y = - 7 - 2.5.
How does this scheme fare compared to the local
measurements-based scheme? Figure 7 shows that, for
most of the PL /PG range, the synchophasor-based islanding scheme is slightly slower than the islanding scheme
based on the local 81R detection element. This scheme
could be improved by changing the settings to make the
tripping time faster, but the downside of such an
approach is that it may affect the security of the detection
scheme (that is, a microgrid would island in some cases
while the grid is still present).
That said, the scheme's main benefit is reliability and
the elimination of nondetection zones when PL = PG; in
such a case, the synchophasor scheme is faster. Note also
that tighter settings can speed this scheme up, but they
have to be carefully engineered to not cause sympathetic
tripping. Another lesson learned was that for PL/PG ≥ 1, the
voltage angle caused a trip, while for P L/P G < 1, the
microgrid tripped based on the lower limit line.

Lesson 5: Seamless Islanding

-2

acceleration represents the rate of change of slip frequency with respect to time.
Islanding detection is based on Figure 6, which shows
that the normal and islanding regions are based on the
degree set points for slip frequency (the difference
between the grid and microgrid frequencies) and the
accelerations show how quickly they are slipping. The set
points are based on the typical 81U, 81O, and 81R settings
and are +0.5 Hz/s, −0.7 Hz/s, and −2.5 Hz/s. Using 10° as the
voltage angle difference setting and two straight lines that
determine the normal operating region, we get the following set of equations that determine the normal and
islanding region:

I E E E E l e c t r i f i cati o n M agaz ine / MARCH 2020

Seamless islanding within the microgrid was enabled
by using a couple of different schemes, depending on
the type of DER that acts as the main voltage/frequency
source in islanded mode. If the generator is the main
DER source, the scheme is very simple. A microgrid controller sends a command to the generator PLC to change
the operating mode from baseload (parallel with the
utility) to the isochronous (ISO) or islanded mode.
If BESS is the main voltage/frequency source, a
seamless islanding-detection scheme called 85-RIO SEL
Mirror Bits Communications has been developed and
implemented between the PCC relay and both the
BESS PLC and the power conditioning system (PCS).
The scheme uses mirror bits over a serial network
between the PCC relay and digital input/digital output
(DI/DO) module installed within the BESS inverter. In
the field, this communication network is fiber based,
resulting in a total delay less than 2 ms. The DI/DO

IEEE Electrification Magazine - March 2020

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