EDNE July 2012 - (Page 39)

Advertorial Optimizing Motor Controllers with FPGA The use of variable speed drives (VSD) in motor-driven systems provides significant energy savings but VSDs require complex control algorithms that can be limited by off-the-shelf Microcontrollers or Digital Signal Processors, particularly when combined with the requirement for other services like networking and safety. Designers are now turning to FPGAs for next generation VSD systems because of their inherent flexibility, performance and system integration. FPGAs can integrate most of the building blocks of a motor control system, processing the control loops and system management in parallel. Soft processors can manage the system and implement Industrial Ethernet protocols such as EtherCAT or PROFINET, whereas the FPGA logic can handle the time critical motor algorithms such as Field Oriented Control (FOC) in either fixed or floating point. Table 2. Floating & Fixed Point Comparison Implementation LE Usage Multipliers Latency Fixed 16-Bit 2K 4 1.21 µs Fixed 32-Bit 4K 5 1.36 µs Scan to learn more Floating Point 12K 28 2.64 µs Note: The floating point example uses a floating point sine implementation. A fixed point implementation removes 4K LEs and 16 Multipliers. FPGA Advantages for Implementing DSP Algorithms The performance advantages of FPGAs include: • Higher throughput and processing rates due to the parallelism of FPGA hardware Floating-point implementation delivers: • Elimination of arithmetic overflow and scaling issues • Superior performance due to inherently greater numerical stability • Potentially more rapid control loop responses due to high dynamic range • Lower latency due to hardware acceleration of tasks and direct interface between control FPGAs can support both fixed and floating-point However, motor control engineers are solutions, and can easily deliver 200k loops or loop algorithm PGA Optimizing Motor Controllers with Fand sensor interfaces. skilled in software or DSP algorithms but PWM outputs a second. Size optimisation • High-level design synthesis from Simulink are not familiar with FPGA or RTL design. reduces the FPGA resources by a factor of ~4 The use of variable speed drives (VSD) in directly to FPGA systems provides significant cost of a 65% increase in latency (still 10x motor-driven implementation with the at a energy savings but Model-based DSP development VSDs require complex control algorithms abilitycanautomatically trade off latency, Microcontrollers or Digital for FOC!). that to be limited by off-the-shelf faster than the 100ksps required environments (e.g. MATLAB/Simulink) throughput and resource usage. Signal Processors,based tools, such as combined with the requirement for other services like networking and floating point particularly when combined with block This resource optimisation makes In a for next generation VSD systems safety.®Designers are now turning to FPGAstypical FOC controller the inputs are because of theircontrol implementations in one Altera’s DSP Builder Advanced Blockset, and multi-axis inherent sampled at 10-100 ksps. At 100 ksps a new flexibility,designers to work in asystem integration. enable DSP performance and productive low cost device an achievable target, making sample must be processed in less than 10µs and familiar environment and automatically FPGAs the perfect motion control platform and keeping processing latency constant generate can integrate most of the building blocks of a motor control system, processing the control loops and optimised RTL. for tomorrow’s VSDs. FPGAs and to a minimum are beneficial to the system management in parallel. Soft processors can of the control algorithm.and implement Industrial Ethernet control: performance manage the system Advantages of FPGA for motor protocols such as EtherCAT or PROFINET, whereas the FPGA logic can handle the time critical motor • High Performance floating point algorithms such as Field Oriented Control (FOC) in either fixed or floating point. implementation Figure 1. Integrated Industrial Motion Control Solution on an FPGA • MATLAB Simulink to FPGA implementation design flow • FPGA design optimization with DSP Builder • Flexible digital encoder interface (BiSS, EnDat, etc.) • Integrated sigma delta conversion in FPGA logic • Easy multi-axis control option • Add any Industrial Ethernet protocol (eg. EtherCAT, PROFINET, EtherNet/IP, etc) Figure 1. Integrated Industrial Motion Control Solution on an FPGA Visit www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf for more information However, motor control engineers are skilled in software or DSP algorithms but are not familiar with FPGA or RTL design. Model-based DSP development environments (e.g. MATLAB/Simulink) combined with http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf http://www.altera.com/literature/wp/wp-01162-motor-control-toolflow.pdf

Table of Contents for the Digital Edition of EDNE July 2012

Cover
Contents
International Rectifer
Microchip
FTDI
Masthead
Comment
International Rectifer
Pulse
Analog Devices
Digi-Key
Analog Devices
Test & Measurement
Agilent Technologies
Baker's Best
Messe München
Understand and characterize envelope-tracking power amplifiers
Digi-Key
Cover Story
Coilcraft
Digi-Key
Signal Integrity
Altera
USB 3.0 : Bringing SuperSpeed connectivity to mobile devices
Digi-Key
Developing high-frequency integrated circuits for test and measurement
Design idea
Product Roundup
Tales from the cube

EDNE July 2012