The File - May 16 , 2009 - (Page 8)

In Focus | Design for Environment Chip-scale methods unlock renewable energy boom By Darren Brown Alternative Energy Business Development Manager DEK Printing Machines Ltd Environmental concerns and supply-related pressures on energy prices are driving up the demand for viable mass production processes for photovoltaic (PV) cells. As with many technologies, there are several ways to produce PV cells, calling for a variety of different constituent materials, substrate dimensions and manufacturing techniques. Cr ystalline silicon is the longest established substrate technology for PV cells, and doped wafers are produced using processes already familiar to the IC industry. Batches of bulk p-type wafers, in standard sizes of 125mm x 125mm or 156mm x 156mm, are doped using atmospheric or low-pressure diffusion to create a thin n-type upper surface, which is exposed to sunlight in the resulting solar-cell array. Just as an IC wafer, the PV wafers are often etched following the doping processes, and similar techniques are used; in fact PV manufacture is moving towards laser-based etching to create the desired surface features. Each cell produces around 0.5V and acts as a current source. Connecting multiple cells in series produces a usable voltage; 36-cell modules, for example, are capable of charging a 12V battery. Electrical contacts to the individual semiconductor elements are also created at the wafer level, allowing the load to be connected across the cell. Analogous to a process such as solderball attachment in chip-scale packaging, PV cell manufacture typically involves metallisation of the wafer using precision screen printing. Metallisation is applied to both sides of the wafer, with a continuous aluminium-based coating on the underside acting as one electrode. On the front side an array of current-collector fingers is deposited using silverloaded paste to connect the cells to heavy-gauge screen-printed bus bars. Careful process design is necessary to maximise the contacts’ current carrying capacity without shadowing the cell surface and thereby impairing photon absorption. On the one hand typical feature width for current-collector fingers is less than 100 micron, while bus-bar width may be up to 2mm to conduct the combined current with minimum power loss. After fabrication, the completed PV array is usually hermetically sealed using hightransmission glass to promote efficiency, weather resistance, and reliability. Historically crystalline-silicon technology has enabled manufacturers to produce PV cells at relatively low cost and high efficiency; today’s mass-produced modules are able to achieve efficiency of over 16 per cent. The cost of bulk silicon, however, is rising, driven partly by rapid growth in demand for solar cells. To combat this and minimise the cost of each unit—and hence the cost per Watt (the major metric for the renewable energy industries)—the thickness of PV wafers has been progressively reduced in order to cut overall silicon consumption. From a standard thickness of 220 micron, manufacturers are now working towards 150 micron as the typical PV wafer gauge. This is placing extra demands on equipment such as wafer handlers and carriers, which must be capable of moving and clamping the delicate wafers without causing damage. Do more on EE Times India Ask the author Share article Say more • Comment on this article Save silicon with thin-film The increasing price of silicon is also driving developments in thin-film PV cell technology, which address this issue by using smaller quantities of silicon—or alternative materials—as the light-absorbing medium. A number of technologies are being pursued, such as amorphous silicon at a thickness of less than 1 micron, cadmium telluride (CdTe), copper- indium-gallium diselenide, or organic technologies. Unlike crystalline silicon technology a thin-film PV cell is a PIN or hetero-junction device depending on the light absorbing medium, and is typically fabricated using vapor deposition or sputtering processes. A variety of substrate types are feasible, such as rigid glass panels or flexible substrates such as stainless steel, aluminium or a polymer such as polyimide or polyester. This versatility allows solar-power generation to be embedded into diverse types of equipment and everyday objects. Typical efficiency is lower than that of crystalline silicon cells, and leading-edge mass-production units are approaching 10 per cent. Using large substrates, however, allows adequate power to be generated. Panel widths may exceed one metre, and some companies are building cell arrays with surface area equivalent to 4m2. An entire architectural glass panel can be coated in this way and used directly in applications such as office glazing to transform large glass areas into solar-energy generators. Laser scribing is used to create Read related articles • PC vendors adopt green strategies • Rainy days ahead for solar market • Wipro leads green efforts in India the necessary front side features for the cell array, and front and rear connections are created using metallisation processes similar to those applicable to crystalline silicon cells. On the front side, a transparent conductive oxide (TCO) layer is deposited, followed by the current collector grid and bus bar. To ensure adhesion to the TCO, as well as low contact resistance and high conductivity, the front-side metallisation may be a silver-based epoxy. For use with organic substrates this may be a low-temperature epoxy dried at around 70°C, while metallisation for glass or metal substrates may cure at up to 150°C. The rear contact is usually a conductive layer similar to that of a crystalline-silicon cell. CdTe thin-film cells may use a low-temperature carbon ink that is dried at temperatures from 130-200°C. Metallisation processes Despite the underlying differences between thin-film and crystalline silicon technologies, the demands on metallisation materials and processes used continued on page 10 Figure 1: Metallisation process flow for crystalline silicon PV cells. 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Table of Contents for the Digital Edition of The File - May 16 , 2009

The File - May 16 , 2009