IEEE Solid-State Circuits Magazine - Winter 2016 - 81

SOC IET Y n E wS

IEEE Journal on Exploratory Solid-State Computational
Devices and Circuits Launches

The new IEEE Journal on Exploratory
Solid-State Computational Devices and
Circuits (JXCDC) is an open access journal. The scope of the journal is materials,
devices, circuits, and architecture that
relate to the research to find a more energy-efficient way of doing computing than
CMOS, i.e., beyond CMOS technology.
JXCDC is for the publication of results unifying the areas of solid-state
materials, devices, and circuits for
novel computation (logic, memory,
and communication) toward the exploration of beyond-CMOS technology. The publication is not limited
to digital information processing but
also encompasses non-Boolean computation including analog, neuromorphic computing, and novel concepts
in computer automata. It is envisioned that these exploratory devices
and methods of computing could augment CMOS through an improvement
in energy efficiency.
By its nature, JXCDC is a publication that connects materials, devices,
and circuits vertically and specifically
in the area of energy-efficient computation. Such cross-disciplinary papers
are often not a good fit for established
journals. JXCDC is a selective research
publication that scientists and engineers can read to follow developments in beyond CMOS for energyefficient computation.
The papers in this journal have a
maximum length of eight pages, which
are edited and formatted in HTML
for easier referencing. The papers are
allowed to have supplementary material

Digital Object Identifier 10.1109/MSSC.2015.2495892
Date of publication: 21 January 2016

that can be found under the multimedia
tab of the paper on IEEE Xplore.
For submission information, visit
https://mc.manuscriptcentral.com/
jxcdc. JXCDC is sponsored by the IEEE
Solid-State Circuits, Magnetics, Circuits and Systems, and Computer Societies (as financial sponsors). It is also

By its nature, JXCDC
is a publication that
connects materials,
devices, and
circuits vertically
and specifically
in the area of
energy- efficient
computation.

sponsored by the IEEE Electron Devices
Society, Nanotechnology Council, the
Council on Electronic Design Automation, and the Council on Superconductivity (as technical sponsors). Recent
papers in JXCDC are listed below.

New Types of Transistors That Have
a Steep Turn On, i.e., Low Input
Voltage Swing
"Tunnel Field-Effect Transistors
in 2-D Transition Metal
Dichalcogenide Materials"
by H. Ilatikhameneh, Y. Tan, B.
Novakovic, G. Klimeck, R. Rahman,
and J. Appenzeller
In this paper, the performance of
tunnel field-effect transistors (TFETs)
based on two-dimensional (2-D) transition metal dichalcogenide (TMD)

materials is investigated by atomistic
quantum transport simulations. One
of the major challenges of TFETs is
their low ON-currents. The 2-D material-based TFETs can have tight gate
control and high electric fields at the
tunnel junction, and they can, in principle, generate high ON-currents along
with a subthreshold swing (SS) smaller than 60 mV/decade. Simulations
reveal that high-performance TMD
TFETs not only require good gate control but also rely on the choice of the
right channel material with optimum
bandgap, effective mass, and source/
drain doping level. Moreover, the criteria for high ON-currents are explained
with a simple analytic model, showing
the related fundamental factors. Finally, the SS and energy delay of these
TFETs are compared with conventional CMOS devices.

"Polarization-Engineered III-Nitride
Heterojunction Tunnel Field-Effect
Transistors"
by W. Li, S. Sharmin, H. Ilatikhameneh,
R. Rahman, Y. Lu, J. Wang, X. Yan, A. Seabaugh, G. Klimeck, D. Jena, and P. Fay
The concept and simulated device
characteristics of TFETs based on IIInitride heterojunctions are presented
for the first time. Through polarization
engineering, interband tunneling can
become significant in III-nitride heterojunctions, leading to the potential for a
viable TFET technology. Two prototype
device designs, inline and sidewall-gated TFETs, are discussed. Polarizationassisted p-type doping is used in the
source region to mitigate the effect of
the deep Mg acceptor level in p-type
GaN. Simulations indicate that TFETs

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Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016