Instrumentation & Measurement Magazine 25-7 - 30

the self inductance of the connections, the three capacitor chips
were buried vertically into rectangular holes drilled into the
1.5 mm thick dielectric layer. The capacitor's electrodes were
then connected to the micro strip lines and the ground plane
by copper foils having the same thickness as the one of the PCB
metallization.
The full Two-Port calibration was done with a Short Open
Load Thru (SOLT) user cal kit described in [8] and the isolation
standard shown in Fig. 5a. The magnitude of the S21
parameter
Fig. 4. Positive resistances that can be measured with a relative error ≤ 10%
with the VNA manufactured by Keysight: PNA Series: N3382A. (a) One-Port
reflection technique; (b) Two-Port transmission technique, association of the
shunt admittance and the serial impedance insertion modes.
One-Port reflection technique and (b) the association of the
shunt and the serial insertion modes of the Two-Port transmission
technique, respectively. An example of the selection
process is given in the following practical application.
Application to the Measurement of the
ESR of an Ultra High-Q Capacitor
The objective of this section is to measure the ESR of a 100 pF
ultra high-Q capacitor at its first SRF that is about 1 GHz, manufactured
by Exxelia, Ref.: 501SHD101JS. The VNA used is
a PNA Series: N3382A manufactured by Keysight. Knowing
that the typical ESR of an ultra high-Q capacitor is lower than
0.1 Ω, an examination of Fig. 2 and Fig. 3 shows that the TwoPort
transmission technique using the shunt insertion circuit
represented in Fig. 3a must be chosen. Such a circuit behaves
as a strong attenuator; consequently, as mentioned by [6], [7],
an isolation calibration must be added to the full Two-Port
calibration. According to [6], |7], the forward and reverse isolation
calibration is a measure of the crosstalk between port
1 and port 2 with each port terminated with the DUT (Device
Under Test) impedance. Furthermore, the fixture leakage
must be the same during the isolation calibration and the measurement.
An application of these recommendations resulted
in the design of a specific isolation standard and a test fixture
whose electrical diagrams are shown in Fig. 5a and Fig. 5b,
respectively.
The isolation standard and the test fixture were realized on
the same epoxy glass Printed Circuit Board (PCB). To minimize
that was then measured is represented in Fig. 6. As indicated
by marker 1 in Fig. 6, at the first Self Resonant Frequency
(SRF1 ≈ 1.12 GHz), the magnitude of the S21
parameter is|S21
|
≈ -60.1 dB. With such a very small magnitude, the approached
expression (14) was used for computing the ESR of the capacitor.
We found ESR ≈ 24.7 mΩ. According to the diagram in Fig.
4 the theoretical minimum limit of the transmission technique
is about 1.4 mΩ for a relative error objective of 10%. The wide
safety margin between 24.7 mΩ and 1.4 mΩ proves that the
Two-Port transmission technique is well suited for measuring
the very low ESR of an ultra high-Q capacitor.
Conclusion
The reflection and the transmission techniques for measuring
impedances with the S parameters have been presented.
A comparative analysis of each technique showed particularly
that the Two-Port transmission technique is not affected
by any sign inversion error and moreover improves the measurement
range of the One-Port reflection technique by a
factor of about 3600. From this study, the general procedure
for measuring an unknown dipole that follows can be deduced.
Knowing the relative error objective, the limitations of
the One-Port reflection technique are calculated with (7), (8).
The dipole is then tested with this simplest method, and the
measured impedance is compared with the computed limits.
Two comparison's results are then possible: If the measured
value complies with the One-Port reflection technique validity
domains given by (7), (8), then the value measured with the
reflection technique can be accepted. Conversely, if the measured
value does not comply with these validity domains,
then the Two-Port transmission technique must be considered.
In this case, as shown in Fig. 3, the impedance should be
known for choosing the proper insertion mode. Fortunately,
Fig. 5. Electrical diagrams of (a) the isolation standard and (b) the DUT test fixture.
30
IEEE Instrumentation & Measurement Magazine
October 2022
Instrumentation & Measurement Magazine 25-7

Table of Contents for the Digital Edition of Instrumentation & Measurement Magazine 25-7
