IEEE Electrification - June 2021 - 21

featured with the advantages of low
on-resistance, near-zero reverse
recovery charge, low gate charge, low
junction capacitance, and extremely
low package inductance, are suitable
for industrial applications where the
voltage level is less than 650 V. SiC
devices, with the advantages of
almost zero reverse recovery charge,
lower gate charge, low junction ca -
pacitance, and high-temperature
conditions, are suitable for applications
where the voltage level is higher
than 650 V. However, with fast
switching speed and high-frequency
operation, WBG-device-based power
converters suffer from higher dv/dt
and di/dt than Si device-based converters.
One particular problem is
the source inductance of WBG devices.
Changing current through an
inductor produces voltage according to
New topologies have
been proposed from
various aspects, such
as better utilization
of wide-bandgap
devices, soft
switching, component
and cost reduction,
and so on, to improve
dc-dc converter
performance.
EL /di dt#=due
to
the inductive coupling effect. A fast di/dt can produce
a negative source-voltage transient, opposing the " off "
gate drive voltage, which can mistakenly turn a device
on and increase the risk of " shoot-through. " In addition,
fast changes in voltage can cause capacitive current
transients according to
iC / .dv dt#=For
example, the
interwinding capacitance of a transformer, the insolation
capacitance of a gate driver power supply, and the
coupling capacitance between a printed circuit board
(PCB) and the heat sink can increase the common-mode
(CM) current due to the capacitive coupling effect. Specifically,
a larger insolation capacitance of gate driver
power supply will bring in a higher CM current, which
could lead to a false turn-on of the power switches. To
address those challenges, the following approaches can
be considered.
1) Optimize the gate driver loop layout and the power
board layout to reduce loop
inductance as much as possible.
Multiphysics simulation
studies and finite-element
analysis can be helpful to attain
this goal.
Cdc Vdc
+
-
2) Develop and select components,
such as the gate driver
power supply and gate driver
integrated circuit, with lower
parasitic capacitances and high
transient (dv/dt) immunity.
3) Reduce inter- and intrawinding
capacitances when designing a
transformer.
4) Reduce the coupling capacitance
between the power board and
Figure 20. A TPC.
IEEE Electrification Magazine / JUNE 2021
21
the heat sink while guaranteeing
good heat dissipation performance.
Magnetic Integration Techniques
Generally, magnetic components are
the dominating factor in volume and
loss calculation for dc-dc power converters.
For example, in high-frequency
and high step-down ratio dc-dc
converters for the APM (e.g., 400 V/12 V)
applications, the transformer loss
dominates the whole power converter
loss due to the high output current,
the leakage magnetic field caused by
the reduced coupling coefficient for
high turn ratio, and proximity and
skin effects. To realize high-efficiency,
high-density, and high-switching-frequency
dc-dc converters, the following
approaches can be considered for
developing magnetic components.
1) High-frequency magnetic core materials with low loss
and high magnetic flux density can be developed,
which will fundamentally improve the efficiency and
reduce the volume of magnetic components.
2) The magnetic core shape can be optimized to increase
the space utilization. A flat magnetic component
design is a promising approach that can better facilitate
heat dissipation and utilize space, thereby increasing
density. Ultraflat power converters have become
increasingly interesting for transportation applications.
Optimal, segmented air-gap design or the addition
of low-loss energy storage magnetic materials to
the air gap helps reduce air-gap loss and leakage flux.
3) Reduction of high-frequency parasitic parameters
can be attempted, including distributed parasitic
capacitance, high-frequency parasitic resistance,
and high-frequency parasitic inductance, via optimizing
the structure and arrangement of windings.
Lp
Half-Bridge
or
Full-Bridge
.
Np
.
.
Ns
Ls
Half-Bridge
or
Full-Bridge
Lt
Nt
Half-Bridge
or
Full-Bridge
VLV
+
-
VHV
+
-
IEEE Electrification - June 2021

Table of Contents for the Digital Edition of IEEE Electrification - June 2021
