IEEE Circuits and Systems Magazine - Q4 2022 - 39

ΔVmax
106
104
102
100
-0.50
ΔVdata
inner 99.98%
of data
outliers
-0.25
outliers
+0.25
Normalized output voltage V/ΔVmax
Figure 14. distribution of output voltages for the sixth convolution
layer of resnet50-v1.5 (res2b_branch2b), using differential
cells with unsliced weights, collected using the mLPerf
calibration set.
separately calibrated, as are the ADC limits of different
bit slices within a layer, whose outputs can differ greatly
in range.
Fig. 14 shows an example distribution of normalized
output voltages, for a layer in ResNet50-v1.5. Our ADC
range calibration relies on a single statistical property
of these distributions: the range ∆Vdata that contains the
inner P = 99.98% of all collected values of V. This was
empirically determined to be the useful signal range for
ResNet50-v1.5, as clipping the remaining 0.02% of outlier
values had a negligible effect on accuracy. The ADC
limits are chosen to be just large enough to contain the
useful signal range (i.e. ∆VADC ≥ ∆Vdata). For bit-sliced systems,
the ADC limits of different slices are constrained
to differ only by a power of two; this ensures that their
results can still be aggregated via S&A operations without
any complex scaling steps. With unsliced weights,
there is no such constraint on the ADC limits. We note
that in general, the definition of the useful signal range
(set by the single parameter P) may need to be tuned to
optimize the accuracy for a given neural network, dataset,
mapping scheme, and ADC resolution.
Comparing the useful signal range ∆Vdata (normalized
to ∆Vmax) of different mapping schemes and bit
slices reveals important insights about their output
voltage distributions: this is shown in Fig. 15. When
using offset subtraction, as in Fig. 15(a), the useful signal
occupies 10−20% of ∆Vmax; the remainder is used
only by outlier values. This somewhat low percentage
results from the fact that input activations tend
to concentrate near zero, especially in ReLU networks
[47]. Thus, the ADC levels can be safely re-allocated
to cover only this smaller range to offer better signal
resolution.
Fig. 15(b) shows that the useful signal range is orders
of magnitude smaller for differential cells: less than 0.1%
of ∆Vmax
for the top slice. This is principally a result of
proportional mapping: since differential cells use much
lower conductances as shown in Fig. 7, the output
voltages are reduced correspondingly. There is also a
fourth quartEr 2022
Figure 15. output voltage statistics for resnet50-v1.5 with
(a) offset subtraction and (b) differential cells, using 2 bits/
cell, with different constraints on array size. ranges are averaged
over all layers. Bars are colored by bit slice index (0 =
least signficant ).
+0.50
Figure 16. Imagenet accuracy using resnet50-v1.5 vs adc
resolution for different weight mapping schemes, without
calibrated ranges (ΔVadc = ΔVmax ) and with calibrated ranges
(ΔVadc ≈ ΔVdata).
significant signal reduction from the analog cancellation
of positive and negative bit line currents. The smaller
signal range enables a much more aggressive reduction
of the ADC range.
6.3. Matching the ADC to the Algorithm's Precision
Fig. 16 shows the ADC resolution sensitivity of ImageNet
accuracy for different mapping schemes. ADC quantization
is assumed to be deterministic, and cell errors
are not included in order to isolate the ADC's effect. As
described in Section 4.1.3, input bits are aggregated with
digital circuitry for offset subtraction (Bin = 1 bit) and
with analog circuitry for differential cells (Bin = 8 bits).
This leads to a higher analog resolution Bout for differential
cells.
In all cases, calibration of the ADC range allows
high accuracy to be obtained at a reduced resolution.
IEEE cIrcuIts and systEms magazInE
39
# values
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